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What happens on write miss in a write back cache?
First write in main memory then bring the block to cache (dirty bit = 0) or
First bring the block to cache then write it (dirty bit = 1).
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In case of a write miss in write back cache, the block containing the addressed word is first brought into the cache and then the desired word in the cache is overwritten with the new information. This is also called as write allocate policy whereby data at the missed write location is fetched/loaded into the cache, followed by a write-hit operation.

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Didn't get. Same question.

Why don't we first write in memory then bring it to cache.
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@MayankSharma This is how write back policy is implemented. Write back says: initially, writing is done only to the cache. The write to the backing store is postponed until the modified content is about to be replaced by another cache block.

Usually write back is paired with write allocate (i.e. fetch on write) whereby data at the missed write location is brought into the cache followed by a write hit operation. When this block is about to be replaced, then this block is written back to the main memory if the dirty bit of this cache block is set.

Now coming back to your question, if you write the word first in main memory and then bring the block to the cache, then it will result in stalling of the processor during the entire time the word is being written in the MM block, thereby affecting the performance of the processor. Writing in cache is much faster than writing in the MM since cache is much faster as compared to MM.Hence fetching the block from MM and writing it in the cache is better than writing the block in MM and then fetching it to the cache.It is rarely the case that after fetching the block to the cache, the block wont be modifed till it is written back again(because of block replacement) due to the fact that it follows spatial locality(i.e. words in close proximity to the word referred earlier are likely to be referred in the next clock cycles). Hence there is no increase in performance if your approach is followed; rather it results in degradation of performance due to stalling of the processor for a much longer time.

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Yay great.
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