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A certain processor uses a fully associative cache of size $16$ kB, The cache block size is $16$ bytes. Assume that the main memory is byte addressable and uses a $32$-bit address. How many bits are required for the Tag and the Index fields respectively in the addresses generated by the processor?

  1. $24$ bits and $0$ bits
  2. $28$ bits and $4$ bits
  3. $24$ bits and $4$ bits
  4. $28$ bits and $0$ bits
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I think a is the correct answer. As fully Associative cahce do not have index bits. Its address structure is < TAG, WO>
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As 32 bits physical address, 4 bits are for block offset and so there are 28 bits remaining for Tag
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option D) as there are no index in fully associative cache.
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0

8 Answers

1 vote
1 vote
In fully associative cache, search for a block is simultaneously done for all entries based on the Tag.

So no need for indexing ( neither set nor line no).

Total size, tag bits + block offset bits = 32

Block size = 16 B = $2^4$B

So we require 4 bits to address a block. Thus, tag bits = 32 - 4 = 28

Ans D) 28 and 0 bits
1 vote
1 vote

fully associative Cahe:  it contains 

                                        

tag block offset
   

block size =16Byte

no of bit required to represent block size is  4 bit [2^4]

and physical address size given is 32 bits

therefore, tag bit =32-4=28 bits 

                index field bit=0 bit bz there is no concept of index field in  fully associative cache.           

0 votes
0 votes
option D as fully associative block no = tag ; tag bits =  32 bits  – 4 bits for block offset and no index field as it is fully associative.
0 votes
0 votes
Number of tag bits = 28, and 0 bits for index field
Answer:

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