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How many memory accesses are there in this code?

LOAD R1, a(RO)
in CO and Architecture
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3 mem refrence is required

 

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Why do we need pipeline here?

$LOAD$ $ R1, a(RO)$

here $a(R_{0})$ can be indirect addressing mode too

Am I right?

Then loading from memory requires only $1$ memory which added with register value
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What is "A"?
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a is not defined, but it is showing like some memory address

it is like this question of hamacher https://gateoverflow.in/308334/carl-hamacher-machine-instruction-and-programs-chapter-%242%24

 

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