Login
Register
@
Dark Mode
Profile
Edit my Profile
Messages
My favorites
Register
Activity
Q&A
Questions
Unanswered
Tags
Subjects
Users
Ask
Previous Years
Blogs
New Blog
Exams
Dark Mode
Morris Mano Edition 3 Exercise 9 Question 24 (Page No. 396)
ajaysoni1924
asked
in
Digital Logic
Apr 8, 2019
666
views
0
votes
0
votes
The boolean functions for the input of SR latch are as follows. Obtain the circuit diagram using a minimum number of NAND gates.
$S = x _1’x _2’x _3 + x _1x _2x _3$.
$R = x _1x _2’ + x _2x _3’$
digital-logic
morris-mano
sequential-circuit
synchronous-asynchronous-circuits
min-no-gates
ajaysoni1924
asked
in
Digital Logic
Apr 8, 2019
by
ajaysoni1924
666
views
answer
comment
Follow
share this
share
0 Comments
Please
log in
or
register
to add a comment.
Please
log in
or
register
to answer this question.
0
Answers
← Previous
Next →
← Previous in category
Next in category →
Related questions
1
vote
1
vote
0
answers
1
ajaysoni1924
asked
in
Digital Logic
Apr 8, 2019
712
views
Morris Mano Edition 3 Exercise 9 Question 23 (Page No. 396)
Draw the logic diagram of the product of sum expression $ Y = (x _1 + x _2’)(x _2 + x _3)$ Show that there is a static 0 hazard when $x _1$ and $x _3$ is equal to zero and $x _2$ goes from 0 to 1.Find a way to remove hazard by adding one more OR gate.
ajaysoni1924
asked
in
Digital Logic
Apr 8, 2019
by
ajaysoni1924
712
views
digital-logic
morris-mano
sequential-circuit
synchronous-asynchronous-circuits
hazards
1
vote
1
vote
0
answers
2
ajaysoni1924
asked
in
Digital Logic
Apr 8, 2019
1,293
views
Morris Mano Edition 3 Exercise 9 Question 22 (Page No. 396)
Find a circuit that has no static hazard and implements the boolean function: F(A,B,C,D) = $\sum(0,2,6,7,8,10,12)$
ajaysoni1924
asked
in
Digital Logic
Apr 8, 2019
by
ajaysoni1924
1.3k
views
digital-logic
morris-mano
sequential-circuit
synchronous-asynchronous-circuits
hazards
1
vote
1
vote
1
answer
3
ajaysoni1924
asked
in
Digital Logic
Apr 4, 2019
7,707
views
Morris Mano Edition 3 Exercise 6 Question 24 (Page No. 255)
Design the sequential circuit specified by the following state diagram using T flip-flop.
ajaysoni1924
asked
in
Digital Logic
Apr 4, 2019
by
ajaysoni1924
7.7k
views
digital-logic
morris-mano
sequential-circuit
synchronous-asynchronous-circuits
3
votes
3
votes
0
answers
4
ajaysoni1924
asked
in
Digital Logic
Apr 8, 2019
1,071
views
Morris Mano Edition 3 Exercise 9 Question 18 (Page No. 395)
Merge each of the primitive flow table shown in the figure. Proceed as follows: Find all compatible pairs by means of implication table. Find the maximal compatibles by means of a merger diagram FInd the minimal set of compatibles that covers all the states and is closed.
ajaysoni1924
asked
in
Digital Logic
Apr 8, 2019
by
ajaysoni1924
1.1k
views
digital-logic
morris-mano
sequential-circuit
synchronous-asynchronous-circuits
Subscribe to GATE CSE 2024 Test Series
Subscribe to GO Classes for GATE CSE 2024
Quick search syntax
tags
tag:apple
author
user:martin
title
title:apple
content
content:apple
exclude
-tag:apple
force match
+apple
views
views:100
score
score:10
answers
answers:2
is accepted
isaccepted:true
is closed
isclosed:true
Recent Posts
Post GATE 2024 Guidance [Counseling tips and resources]
GATE CSE 2024 Result Responses
[Project Contest] Pytorch backend support for MLCommons Cpp Inference implementation
Participating in MLCommons Inference v4.0 submission (deadline is February 23 12pm IST)
IIITH PGEE 2024 Test Series by GO Classes
Subjects
All categories
General Aptitude
(3.5k)
Engineering Mathematics
(10.4k)
Digital Logic
(3.6k)
Programming and DS
(6.2k)
Algorithms
(4.8k)
Theory of Computation
(6.9k)
Compiler Design
(2.5k)
Operating System
(5.2k)
Databases
(4.8k)
CO and Architecture
(4.0k)
Computer Networks
(4.9k)
Artificial Intelligence
(79)
Machine Learning
(48)
Data Mining and Warehousing
(25)
Non GATE
(1.4k)
Others
(2.7k)
Admissions
(684)
Exam Queries
(1.6k)
Tier 1 Placement Questions
(17)
Job Queries
(80)
Projects
(11)
Unknown Category
(870)
64.3k
questions
77.9k
answers
244k
comments
80.0k
users
Recent Blog Comments
category ?
Hi @Arjun sir, I have obtained a score of 591 in ...
download here
Can you please tell about IIT-H mtech CSE self...
Please add your admission queries here:...
Twitter
WhatsApp
Facebook
Reddit
LinkedIn
Email
Link Copied!
Copy
