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Recent questions tagged flip-flop
2
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1
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1
GO Classes Test Series 2024 | Mock GATE | Test 12 | Question: 51
We would like to use a $\text{T}$ flip-flop and design a circuit that works like a $\text{J-K}$ flip-flop. The simplified input to the $\text{T}$ flip-flop should be: $\mathrm{T}=\mathrm{J}=\mathrm{K}$ $\text{T}=\text{JQ}^{\prime}+\text{K}^{\prime} Q$ $\text{T}=\text{JQ}^{\prime}+K Q$ $\text{T}=\text{JQ}+\text{KQ}'$
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GO Classes
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3
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2
GO Classes Test Series 2024 | Mock GATE | Test 12 | Question: 52
Consider the sequential circuit shown below. Consider the following state assignment: $\text{A}$ stands for $\text{Q = 0, B}$ stands for $\text{Q = 1}.$ The state transition diagram for the circuit above is shown in: a b c d
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Digital Logic
Jan 21
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GO Classes
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2
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2
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3
GO Classes Test Series 2024 | Mock GATE | Test 11 | Question: 39
The circuit shown below is designed using two multiplexers. This circuit is equivalent to: a positive edge triggered $\mathrm{T}$ flip flop a negative edge triggered $\mathrm{T}$ flip flop a negative edge triggered $\text{D}$ flip flop a positive edge triggered $\mathrm{D}$ flip flop
GO Classes
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Digital Logic
Jan 13
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GO Classes
751
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goclasses2024-mockgate-11
goclasses
digital-logic
sequential-circuit
flip-flop
2-marks
0
votes
0
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4
GFG CSE Mock 2018 | Sequential Circuits
Consider following counters: Counter-1: Counter-2: Which of the following option is correct? Counter-1 is a three-bit "counter" which counts $0, 1, 2, 4, 5, 7, 0, ... . $ ... $0, 1, 2, 3, 5, 6, 0, ... $.
rajveer43
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in
Digital Logic
Jan 12
by
rajveer43
84
views
digital-counter
digital-logic
sequential-circuit
flip-flop
3
votes
0
answers
5
[Self Doubt] Conversion of SR-flipflop to T-flipflop
The standard approach for solving such problem is as follows: This approach gives us the equation for $S$ & $R$ in terms of $T, Q$ as $S = T\overline Q \qquad \to (1)$ $R = TQ \qquad \to (2)$ I tried using a different ... & $(7)$, we get $S=T\overline{Q}$ and $R=TQ$ which is consistent with the standard approach and maintains $SR=0$
thehitchh1ker
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in
Digital Logic
Oct 31, 2023
by
thehitchh1ker
279
views
digital-logic
flip-flop
self-doubt
0
votes
1
answer
6
Made easy workbook
rishabh-441
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Digital Logic
Jun 1, 2023
by
rishabh-441
246
views
made-easy-booklet
digital-logic
flip-flop
1
vote
1
answer
7
GO Classes 2023 | IIITH Mock Test 1 | Question: 37
A new flip-flop, called AB flip-flop, is created as shown below. What does the flip-flop do? Set command when $A = 0 , B = 0$ Reset command when $A = 0 , B = 1$ Hold command when $A = 1 ,B = 0$ Toggle command when $A = 1 , B = 1$
GO Classes
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Digital Logic
Mar 26, 2023
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GO Classes
479
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flip-flop
1-mark
1
vote
1
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8
GO Classes 2023 | IIITH Mock Test 1 | Question: 38
In an $SR$ latch created by cross-coupling two NOR gates, which of the following values for $S$ and $R$ will lead to an indeterminate state? $S = 0, R = 0$ $S = 0, R = 1$ $S = 1, R = 0$ $S = 1, R = 1$
GO Classes
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in
Digital Logic
Mar 26, 2023
by
GO Classes
494
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goclasses
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flip-flop
1-mark
6
votes
1
answer
9
GATE CSE 2023 | Question: 33
Consider a sequential digital circuit consisting of $\mathrm{T}$ flip-flops and $\mathrm{D}$ flip-flops as shown in the figure. $\text{CLKIN}$ is the clock input to the circuit. At the beginning, $\text{Q1, Q2}$ and $\text{Q3}$ have values $0,1$ and $1,$ respectively. ... $\text{NEVER}$ be obtained with this digital circuit? $(0,0,1)$ $(1,0,0)$ $(1,0,1)$ $(1,1,1)$
admin
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in
Digital Logic
Feb 15, 2023
by
admin
8.7k
views
gatecse-2023
digital-logic
sequential-circuit
flip-flop
2-marks
2
votes
1
answer
10
GATE CSE 2023 | Memory Based Question: 22
The initial state of a given sequential circuit is $Q_0 Q_1 Q_2=011$. Which of the following state does not occur $101$ $111$ $001$ $100$
GO Classes
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in
Digital Logic
Feb 5, 2023
by
GO Classes
1.0k
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flip-flop
0
votes
0
answers
11
Design a Asynchronous Up counter that start it’s counting from zero and ends at 11 and again starts from zero. Draw the output status of all Flip Flops after every clock. How many clocks are required to reach 11?
M.Zain
asked
in
Digital Logic
Dec 30, 2022
by
M.Zain
278
views
digital-logic
clock-cycles
flip-flop
1
vote
0
answers
12
DRDO CSE 2022 Paper 1 | Question: 23
For two flip-flops $F_{1}$ and $F_{2}$ and input $\mathrm{X}$, the next state and output is given as \[ \begin{array}{c} F_{1}(t+1)=\sum(1,2,5,6) \\ F_{2}(t+1)=\sum(3,7) \\ Y\left(F_{1}, F_{2}, X\right)=\sum(4,6) \end{array} \] Write functions for the next state and output of the circuit.
admin
asked
in
Digital Logic
Dec 15, 2022
by
admin
235
views
drdocse-2022-paper1
digital-logic
sequential-circuit
flip-flop
6-marks
descriptive
0
votes
1
answer
13
Digital Logic Question
rsansiya111
asked
in
Digital Logic
Oct 7, 2022
by
rsansiya111
459
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flip-flop
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