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Recent questions tagged synchronous-asynchronous-circuits

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Difference between no of states of synchronous vs asynchronous counters
What are the no of states b/w synchronous vs asynchronous counters

h4kr asked in Digital Logic Jan 5, 2023

by h4kr

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GO Classes Test Series 2023 | Digital Logic | Test 3 | Question: 21
Consider the sequential circuit shown in the figure, where both flip-flops $\text{FD A}$ and $\text{FD B}$ used are positive edge-triggered $D$ flip-flops. The state of this circuit is represented by $(AB).$ This circuit is a $2$-bit complex ... $2.$ Number of PI for $D_{A}$ is $2$ and Number of EPI for $D_{B}$ is $3.$

GO Classes asked in Digital Logic Jun 2, 2022

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GO Classes Test Series 2023 | Digital Logic | Test 3 | Question: 22
Consider the sequential circuit shown in the figure, where both flip-flops $\text{FD A}$ and $\text{FD B}$ used are positive edge-triggered $D$ flip-flops. The state of this circuit is represented by $(AB).$ This circuit is a ... when $x=1$. It works as a down counter when $x=1$ and works as a johnson counter when $x=0$.

GO Classes asked in Digital Logic Jun 2, 2022

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GO Classes Test Series 2023 | Digital Logic | Test 3 | Question: 23
Consider the following circuit. What are the values of $P, Q, R$ after two cycles if $P=0, Q=1$ and $R=0$ to begin with? $011$ $101$ $100$ $111$

GO Classes asked in Digital Logic Jun 2, 2022

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GO Classes Test Series 2023 | Digital Logic | Test 3 | Question: 25
Consider the following circuit. $10011000010$ is supplied to the "data" terminal in $11$ clock cycles. After that the values of $q_2 q_1 q_0$ are $000$ $010$ $101$ $111$

GO Classes asked in Digital Logic Jun 2, 2022

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Morris Mano Edition 3 Exercise 9 Question 24 (Page No. 396)
The boolean functions for the input of SR latch are as follows. Obtain the circuit diagram using a minimum number of NAND gates. $S = x _1’x _2’x _3 + x _1x _2x _3$. $R = x _1x _2’ + x _2x _3’$

ajaysoni1924 asked in Digital Logic Apr 8, 2019

by ajaysoni1924

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Morris Mano Edition 3 Exercise 9 Question 23 (Page No. 396)
Draw the logic diagram of the product of sum expression $ Y = (x _1 + x _2’)(x _2 + x _3)$ Show that there is a static 0 hazard when $x _1$ and $x _3$ is equal to zero and $x _2$ goes from 0 to 1.Find a way to remove hazard by adding one more OR gate.

ajaysoni1924 asked in Digital Logic Apr 8, 2019

by ajaysoni1924

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Morris Mano Edition 3 Exercise 9 Question 22 (Page No. 396)
Find a circuit that has no static hazard and implements the boolean function: F(A,B,C,D) = $\sum(0,2,6,7,8,10,12)$

ajaysoni1924 asked in Digital Logic Apr 8, 2019

by ajaysoni1924

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Morris Mano Edition 3 Exercise 9 Question 18 (Page No. 395)
Merge each of the primitive flow table shown in the figure. Proceed as follows: Find all compatible pairs by means of implication table. Find the maximal compatibles by means of a merger diagram FInd the minimal set of compatibles that covers all the states and is closed.

ajaysoni1924 asked in Digital Logic Apr 8, 2019

by ajaysoni1924

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Morris Mano Edition 3 Exercise 9 Question 17 (Page No. 395)
Reduce the number of states in the state table listed below. Use an implication table.

ajaysoni1924 asked in Digital Logic Apr 8, 2019

by ajaysoni1924

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Morris Mano Edition 3 Exercise 9 Question 16 (Page No. 395)
Using the implication table method, show that the state table listed in the figure cannot be reduced any further.

ajaysoni1924 asked in Digital Logic Apr 8, 2019

by ajaysoni1924

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Morris Mano Edition 3 Exercise 9 Question 15 (Page No. 395)
Assign output values to the don’t care states in the flow tables in the figure below in such a way as to avoid transient output places

ajaysoni1924 asked in Digital Logic Apr 8, 2019

by ajaysoni1924

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Morris Mano Edition 3 Exercise 9 Question 14 (Page No. 394)
It is necessary to design an asynchronous sequential circuit with two inputs, $x _1 and x _2$, and one output $z$. Initially, both input and output are zero. when $x _1 and x _2$ becomes 1, z becomes 1. when the ... for the circuit and show that it can be reduced to the flow table shown in the figure complete the design of the circuit.

ajaysoni1924 asked in Digital Logic Apr 8, 2019

by ajaysoni1924

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Morris Mano Edition 3 Exercise 9 Question 13,25 (Page No. 394)
A traffic light is installed at the junction of the railroad and a road. The traffic light is controlled by two switches in the rails placed one mile apart on either side of the junction. A switch is turned on when a ... circuit. show that the flow table can be reduced to four rows Complete the circuit specified in the above problem.

ajaysoni1924 asked in Digital Logic Apr 8, 2019

by ajaysoni1924

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Morris Mano Edition 3 Exercise 9 Question 12 (Page No. 394)
Obtain a primitive flow table for a circuit with two inputs, $x _1 and x _2$ and two outputs $y _1 and y _2$, that satisfy the following four conditions. When $x _1x _2 = 00$, the output is $z _1z _2 = 00$. when $x _1 = 1$ and ... $x _1$ changes from 0 to 1, the output is $z _1z _2$ = 10. otherwise the output does not change.

ajaysoni1924 asked in Digital Logic Apr 8, 2019

by ajaysoni1924

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Morris Mano Edition 3 Exercise 9 Question 11 (Page No. 394)
Implement the circuit defined below with NAND SR latch. An asynchronous sequential circuit has two internal states and one output. The excitation and output functions describing the circuit are as follows. $Y _1 = x _1x _2 + x _1y _2’ + x _2’y _1$ $Y _2 = x _2 + x _1y _1’y _2 + x _1’y _1$ $z = x _2 + y _1$

ajaysoni1924 asked in Digital Logic Apr 8, 2019

by ajaysoni1924

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Morris Mano Edition 3 Exercise 9 Question 10 (Page No. 394)
Implement the circuit with defined below with NOR SR latch. an asynchronous circuit is described by the following excitation and output functions: $Y = x _1x _2’ + (x _1 + x _2’)y$ $z = y$

ajaysoni1924 asked in Digital Logic Apr 8, 2019

by ajaysoni1924

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Morris Mano Edition 3 Exercise 9 Question 9 (Page No. 394)
For the asynchronous sequential circuit shown in the figure: Derive the boolean functions for the outputs of two SR latches $Y _1 and Y _2$. Note that the S input of the second latch is $x _1’y _1’$. Derive the transition table and output map of the circuit.

ajaysoni1924 asked in Digital Logic Apr 7, 2019

by ajaysoni1924

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Morris Mano Edition 3 Exercise 9 Question 8 (Page No. 394)
Convert the circuit of the figure to the asynchronous sequential circuit by removing the clock-pulse(CP) and changes the flip-flops to the SR latches. Derive the transition table and output map of the modified circuit.

ajaysoni1924 asked in Digital Logic Apr 7, 2019

by ajaysoni1924

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Morris Mano Edition 3 Exercise 9 Question 7 (Page No. 394)
Analyze the T flip-flop shown in the figure. Obtain the transition table and show that the circuit is unstable when both T and CP are equal to 1.

ajaysoni1924 asked in Digital Logic Apr 7, 2019

by ajaysoni1924

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Morris Mano Edition 3 Exercise 9 Question 6 (Page No. 393)
Investigate the transition table of the figure and determine all the race conditions whether they are critical or not critical. Also, determine whether there are any cycles.

ajaysoni1924 asked in Digital Logic Apr 7, 2019

by ajaysoni1924

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Morris Mano Edition 3 Exercise 9 Question 5 (Page No. 393)
Convert the flow table of the figure into a transition table by assigning the following binary values to the states: a = 00, b = 11, and c = 10. Assign values to the extra fourth state to avoid critical races. Assign output to the don’t care states to avoid momentary false output. Derive the logic diagram of the circuit.

ajaysoni1924 asked in Digital Logic Apr 7, 2019

by ajaysoni1924

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Morris Mano Edition 3 Exercise 9 Question 4 (Page No. 392)
An asynchronous sequential circuit has two internal states and one output. The excitation and output functions describing the circuit are as follows. $Y _1 = x _1x _2 + x _1y _2' + x _2'y _1$ ... Draw the logic diagram of the circuit. Derive the transition table and the output map. Obtain a flow table for the circuit.

ajaysoni1924 asked in Digital Logic Apr 7, 2019

by ajaysoni1924

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Morris Mano Edition 3 Exercise 9 Question 3 (Page No. 392)
an asynchronous circuit is described by the following excitation and output functions: $Y = x _1x _2’ + (x _1 + x _2’)y$ $z = y$ Draw the logic diagram of the circuit. Derive the transition table and the output map. obtain a two-state flow table. Describe in the words the behavior of the circuit.

ajaysoni1924 asked in Digital Logic Apr 7, 2019

by ajaysoni1924

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Morris Mano Edition 3 Exercise 9 Question 2 (Page No. 392)
Derive a transition table for the asynchronous sequential circuit given in the figure. Determine the sequence of the internal states $y _1Y _2$ for the following sequence of the input $x _1x _2$: 00,10,11,01,11,10,00.

ajaysoni1924 asked in Digital Logic Apr 7, 2019

by ajaysoni1924

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Morris Mano Edition 3 Exercise 9 Question 1 (Page No. 392)
Explain the difference between synchronous and asynchronous sequential circuits. Define fundamental mode operation. Explain the difference between stable and unstable states. what is the difference between an internal state or a total state?

ajaysoni1924 asked in Digital Logic Apr 7, 2019

by ajaysoni1924

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Recent questions tagged synchronous-asynchronous-circuits