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Questions by Learner_jai
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1
MadeEasy Test Series: CO & Architecture - Speedup
A hypothetical processor on cache read miss require one clock to send an address to MM and eight clock cycle to access a 64 bit word from MM to processor cache.miss rate of read is decreased from 14.8% to 2.6% when line size of cache is ... bz , the complete line got transfer when request of one word is made in ans key it is 4*(1+8) mentioned
asked
in
CO and Architecture
Jan 17, 2019
359
views
co-and-architecture
speedup
made-easy-test-series
0
votes
0
answers
2
ME test
cache B access time ?
asked
in
CO and Architecture
Jan 15, 2019
274
views
made-easy-test-series
co-and-architecture
0
votes
0
answers
3
ME CBT 1
WHICH ONE OF THE following represent the overflow in signed arithmetic? xyx+x’y’z’ x’yz’ + xyz’ x’y’z+xyz’ xy’z’ + x’y’z Dount: in this it is not mentioned anything about x,y,z how one can assume two are number and one is for carry without information, x,y,z can be three numbers also, we all know answer bz it is already come in gate previous year, please guide me
asked
in
Digital Logic
Jan 14, 2019
201
views
0
votes
0
answers
4
Made Easy CA
memory can be accessed only through load and store,p,q,r,s,t initially stored in memory,binary operator can be evaluated only when both operands are in register, I am getting 3 , but given is 4 .
asked
in
CO and Architecture
Dec 30, 2018
169
views
0
votes
3
answers
5
MadeEasy Test Series: CO & Architecture - Addressing Modes
The Data transfer instruction size is $64-bit$ ALU, ALU operation instruction size is $32-bit$ and branch instruction size is $16-bit$. Assume program has been loaded in the memory starting from address 3000 decimal. If an ... executing, PC value will be 3030, but given answer is 3028 Previous Q: https://gateoverflow.in/1058/gate2004-63
asked
in
CO and Architecture
Dec 27, 2018
1.6k
views
co-and-architecture
made-easy-test-series
addressing-modes
0
votes
0
answers
6
Compiler theory
LR grammars describe a proper superset of the languages recognized by LL (predictive) parsers “Unable to interpret this statement completely” Please guide Source: https://parasol.tamu.edu/~rwerger/Courses/434/lec8.pdf
asked
in
Compiler Design
Dec 23, 2018
255
views
compiler-design
0
votes
0
answers
7
Rice theorem
1.{<M>| M is a TM accepts any string starting with 1} 2.{<M>| M is TM accept exactly 20 strings} Please guide I don’t know how to apply rice theorem. for 1. Is Tyes = { string starting with 1} Tno = { all strings – strings starting with 1} what is Tyes and Tno here? I only conclude by intution that when we provide strings as input some got into loop and some got accepts .
asked
in
Theory of Computation
Dec 17, 2018
602
views
rice-theorem
decidability
1
vote
1
answer
8
Turing Machine lecture content stan..
A = { <M,w> | M is a TM that accepts W} what is A’( A complement)? Pls guide : M is a Tm doesn,t accept w, Unable to approach further Source:https://web.stanford.edu/class/archive/cs/cs103/cs103.1134/lectures/20/Small20.pdf
asked
in
Theory of Computation
Dec 16, 2018
305
views
turing-machine
decidability
0
votes
0
answers
9
JOIN (Natural join)
In a natural join, the common attribute occur only once, but in join https://gateoverflow.in/3718/gate2004-it-74 Select * from Student, Department in this common, attribute we have given m+n I tried in w3 schools https://www.w3schools. ... Orders, Customers WHERE City='Berlin' AND OrderID = '10248' here common attribute is occuring only once, PLease guide .
asked
in
Databases
Dec 14, 2018
411
views
natural-join
databases
sql
0
votes
1
answer
10
Interview Question
Given an Unsorted array, Find maximum in less than O(n) time? How can we do this?
asked
in
Algorithms
Nov 27, 2018
478
views
interview
array
algorithm-design
0
votes
0
answers
11
gate calculator 86.4 or 86.5
The probability that the ace of the spades will be drawn from a pack of well-shuffled cards atleast once in 104 consecutive trials is __________. (in % upto 1 decimal place)
asked
in
Probability
Jan 30, 2018
3.0k
views
2
votes
0
answers
12
TEST VERtICEs,GrApH
Assume that G is a simple graph of 20 edges, 6 vertex of degree 4 and other nodes have degrees 5, then the maximum number of vertex of G is _______. Answer given is 9, But how 9 can be? 6 vertex of degree 4, 3 vertex of degree 5 ( contradict :odd degree should be even in number) I think it will be 8
asked
in
Mathematical Logic
Jan 20, 2018
257
views
4
votes
1
answer
13
DCFL COMPLETENESS PROBLEM
DCFL COMPLETENESS PROBLEM is decidable or not? L=(sigma)* Not getting any discussion regarding it in GO,iN GO chart it is decidable but I am not able to conclude the reason please guide?
asked
in
Theory of Computation
Jan 18, 2018
711
views
1
vote
0
answers
14
Made Easy DATA INTER.
In 2nd figure total is 110 not 100 ,I am getting 77.2.Please guide
asked
in
Verbal Aptitude
Jan 16, 2018
228
views
3
votes
0
answers
15
Recursion
The sum of all values printed by Rec (6) is _______.
asked
in
Programming in C
Dec 29, 2017
756
views
1
vote
1
answer
16
Probability NPTEL assignment
Find Value of alpha?
asked
in
Mathematical Logic
Dec 20, 2017
472
views
0
votes
0
answers
17
cache memory ,please help!
Doubt: Stuck with equations, Please guide,I am not getting answers with this and still I am not able to conclude my mistake Cache: Read- Hit rate(Hit time) + Miss rate[Hit rate Memory(cache search time+MM )+Miss rate memory(cache search time+MM +sec ... units. Then, the value of P is I have not Mug up any formula but even though came up with wrong answers,Please guide
asked
in
CO and Architecture
Dec 18, 2017
218
views
1
vote
0
answers
18
Random
Consider the simple nested-loop join of the following two relations r and s. Relation r s Tuples (n) 2400 1500 Blocks (b) 40 50 Assuming the worst case memory availability, i.e., the memory can hold only one block of each relation at a time, what is the number of block transfers and seeks? Doubt: I am unable to find number of seek,Please guide?
asked
in
Databases
Dec 11, 2017
144
views
1
vote
0
answers
19
Assignment-Cache,please guide
The access time of cache memory is 45 nsec and that of main memory is 750 nsec. It is found that 75% of memory requests are for read and remaining for write. If the hit access for read and write is 0.9 and 1 respectively and write through protocol is ... protocol is used in write equation In answer given 0.75[0.9(45)+0.1(750)] where i lag the concept,please help
asked
in
CO and Architecture
Dec 10, 2017
371
views
0
votes
1
answer
20
Test-Assignment
Doubt:getting confused in these two options, if 1 is true,what changes make 2 true or vice versa Consider the set of relations shown below and the SQL query that follows. Students: (Roll_number, Name, Date_of_birth) Courses: (Course number, Course_name, Instructor ... at the minimum one of the courses taught by Verma Name of all passed students in all of the courses taught by Verma
asked
in
Databases
Dec 10, 2017
594
views
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