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State TRUE or FALSE and give reasons please?

  1. DMA is a mechanism for allowing an I/O device to transfer data to and from memory without involving the CPU in the transfer.
  2. An advantage of implementing threads in user space is that they don't incur the overhead of having the OS schedule their execution.

       3. A context switch from one process to another can be accomplished without executing OS code in kernel mode.

        4.A TLB miss could occur even though the requested page was in memory.

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1 True. Transfer is done with minimal involvement of CPU

2 True. User level threads are scheduled by the process itself. The programmer has to implement that logic.

3 Not sure. Scheduler schedules the process and dispatcher does context switch. Both are implemented by OS. Must be true though.

4 True. TLB stores only recent address translations.
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@gauravkc i think for Option 3 it should be false because if case of context switch we flush the TLB, I think this will be done by OS

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edited by

@Hemanth_13 Yes OS does that. I'm not sure that it has to be done in kernel mode or not. Probably must be false as it involves flushing TLB as u said along with changes in registers and all. It must be executed in kernel mode.

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1. True: CPU is not involved in transfer but DMA does communicate with CPU for bus request before the transfer happens.
2. True. User level threads don't require support from kernel(entire application is one single thread for kernel and user implements logic).
3. False http://www.linfo.org/context_switch.html.

4. True

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can you give example why 4 is true
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@sandygate , TLB usually contains recent addresses and it is possible that CPU generates an address which hasn't been referred in a long time and thus TLB has no entry for such page but page might exist in cache or RAM.

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