Virtual Gate Test Series: Digital Logic - NAND Gates

Question

The minimum number of $2$-input $NAND$ gates required to implement the function $F = (x' + y')(z + w)$ is ______

Comments

Answer is $4$. This question is already asked in Gateoverflow (search)

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plz give a linK??

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See this

Answer 1

4 two input NAND gates

F = (x' + y').z  +  (x' +y').w

  = (xy)'.z  + (xy)'.w

  = ( ( (xy)'.z )' . ( (xy)'.w )' )'

We can tie the inputs 'x' and 'y' to 1^st NAND gate to implement the function (xy)' and the output of this gate can be connected to the inputs of the  2^nd  and 3^rd NAND gate.The other remaining input of the  2^nd  and 3^rd NAND gate will be 'w' and 'z'.The output of 2^nd and 3^rd NAND gate will than be connected to the inputs of the 4^th NAND gate.

Answer 2

aa

for this type of problem first try to convert expression into nand logic.
f= (x' + y')(z+w)
=  (xy)'(z+w) ----- here  (x' + y') is now converted into NAND logic  (xy)'
now sppose A = (xy)'
f= A(z+w)
=Az+Aw ----- it is a sop expression requires 2 level and- or circuit or 2-level NAND-NAND circuit.
u can also convert this into NAND logic
f=((Az)'(Aw)')' ---- this expression shows require 3 NAND gate 1 for  (Az)' 2nd for  (Aw)' and 3rd for ((Az)'(Aw)')'
and before this 1 NAND gate also reqire for  A=(xy)'
so total no of NAND gates = 4 
---------  hope u ll get it in a proper way after this explanation....

Comments

its good that you got the answer. but i want to know how to approach this problem. from where you started .

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for this type of problem first try to convert expression into nand logic.
f= (x' + y')(z+w)
=  (xy)'(z+w) ----- here  (x' + y') is now converted into NAND logic  (xy)'
now sppose A = (xy)'
f= A(z+w)
=Az+Aw ----- it is a sop expression requires 2 level and- or circuit or 2-level NAND-NAND circuit.
u can also convert this into NAND logic
f=((Az)'(Aw)')' ---- this expression shows require 3 NAND gate 1 for  (Az)' 2nd for  (Aw)' and 3rd for ((Az)'(Aw)')'
and before this 1 NAND gate also reqire for  A=(xy)'
so total no of NAND gates = 4
---------  hope u ll get it in a proper way after this explanation....

Answer 3

We can reduce this function to minimum one first

(x'+y')(z+w) = x'z +x'w + y'z + y'w. which in turn minimize to => y'z + wy' + zx'

so F = y'z + wy' + zx'

F' = (y'z)' .(wy')' .( zx')'

F = ((y'z)' .(wy')' .( zx')')'

so we can find that it needs 4 nand gate.

Comments

How ?

Answer 4

see point no1 for nand gates question should be in the form of sop/ssop(standard sum  of products)

so i consider (x'+y') as p

therfore p(z+w)=pz+pw  for this 3 nand gates required and

for the implementaion of p we require 1 nanad gate the ftotal are 4nand gates

Comments

yes.this method is also correct. 4 nos NAND GATES are required.