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1
GATE CSE 2024 | Set 2 | Question: 37
Let $A$ be an $n \times n$ matrix over the set of all real numbers $\mathbb{R}$. Let $B$ be a matrix obtained from $A$ by swapping two rows. Which of the following statements is/are TRUE? The determinant of $B$ is the negative of the ... If $A$ is symmetric, then $B$ is also symmetric If the trace of $A$ is zero, then the trace of $B$ is also zero
Arjun
asked
in
Linear Algebra
Feb 16
by
Arjun
1.8k
views
gatecse2024-set2
linear-algebra
multiple-selects
2
votes
0
answers
2
GATE CSE 2024 | Set 2 | Question: 48
A non-pipelined instruction execution unit operating at $2 \mathrm{GHz}$ takes an average of $6$ cycles to execute an instruction of a program $\text{P}$. The unit is then redesigned to operate on a $5$ ... hazards. The speedup (rounded off to one decimal place) obtained by the pipelined design over the non-pipelined design is ____________.
Arjun
asked
in
CO and Architecture
Feb 16
by
Arjun
1.5k
views
gatecse2024-set2
numerical-answers
co-and-architecture
pipelining
0
votes
0
answers
3
How is mtech from IIT kanpur cybersecurity in terms of placements and will i get chance for internship? My gate rank in 271 in GATE CSE 2023 , will i be able to get it or should i look for mtech in CSE from other colleges? Till which COAP round should i wait?
prakhars shankar
asked
in
IISc/IITs
May 2, 2023
by
prakhars shankar
625
views
admissions
mtech
iit
0
votes
0
answers
4
GATE CSE 1995 | Question: 17b
Consider a CRT display that has a text mode display format of $80×25$ characters with a $9×12$ character cell. What is the size of the video buffer RAM for the display to be used in monochrome ($1$ bit per pixel) graphics mode
Arjun
asked
in
Computer Peripherals
Jul 14, 2019
by
Arjun
1.4k
views
gate1995
computer-peripherals
descriptive
out-of-gate-syllabus
4
votes
0
answers
5
How to prepare for GATE CSE 2019 along with a job ? Is it possible to prepare myself without any coaching?
ankit aingh
asked
in
GATE
Apr 28, 2018
by
ankit aingh
3.9k
views
preparation
career-advice
2
votes
0
answers
6
GATE CSE 2017 Set 1 | Question: 15 with modification
A sender S sends a message m to receiver R, in which the message digest is digitally signed by S with its private key. In this scenario, one or more of the following security violations can take place. (I) S can launch a birthday attack to ... is case 1 and then arrived at the answer as option B what if it was case 2 the answer is still the same?
A_i_$_h
asked
in
Computer Networks
Oct 24, 2017
by
A_i_$_h
497
views
5
votes
0
answers
7
GATE CSE 2017 Set 1 | Question: 10
https://gateoverflow.in/118290/gate2017-1-10 There is a confusion between option B and C It cannot be option B because the variable c has no power , its always taken as 1 which is not what the grammar says Option C - should be the ans i feel please help
A_i_$_h
asked
in
Theory of Computation
Oct 23, 2017
by
A_i_$_h
548
views
1
vote
0
answers
8
GATE CSE 1988 | Question: 17i-ii-iii
The following table gives the cost of transporting one tonne of goods from the origins A, B, C to the destinations F, G, H. Also shown are the availabilities of the goods at the origins and the requirements at the destinations. The ... . For the solution of (ii) above, calculate the values of the duals and determine whether this is an optimal solution.
go_editor
asked
in
Others
Dec 20, 2016
by
go_editor
580
views
gate1988
linear-programming
descriptive
out-of-gate-syllabus
0
votes
0
answers
9
GATE CSE 1988 | Question: 16ii-iii
If $x \| \underline{x} \| \infty = 1< i^{max} < n \: \: max \: \: ( \mid x1 \mid ) $ for the vector $\underline{x} = (x1, x2 \dots x_n)$ ... known property of this norm. Although this norm is very easy to calculate for any matrix, explain why the condition number is difficult (i.e. expensive) to calculate.
go_editor
asked
in
Linear Algebra
Dec 20, 2016
by
go_editor
734
views
gate1988
descriptive
matrix
out-of-gate-syllabus
1
vote
0
answers
10
GATE CSE 1988 | Question: 13ib
Verify whether the following mapping is a homomorphism. If so, determine its kernel. $\overline{G}=G$
go_editor
asked
in
Graph Theory
Dec 20, 2016
by
go_editor
483
views
gate1988
normal
descriptive
group-theory
group-homomorphism
out-of-gate-syllabus
1
vote
0
answers
11
GATE CSE 1988 | Question: 13ia
Verify whether the following mapping is a homomorphism. If so, determine its kernel. $G$ is the group of non zero real numbers under multiplication.
go_editor
asked
in
Set Theory & Algebra
Dec 20, 2016
by
go_editor
443
views
gate1988
normal
descriptive
group-theory
group-homomorphism
out-of-gate-syllabus
1
vote
0
answers
12
GATE CSE 1988 | Question: 9ii
The code for the implementation of a sub-routine to convert positive numeric data from binary to appropriate character string in a $PDP-11$ like machine has been given below Note-that $SP$ is the stack pointer and $R_i$ represents $i^{th}$ ...
go_editor
asked
in
CO and Architecture
Dec 19, 2016
by
go_editor
495
views
gate1988
normal
descriptive
co-and-architecture
unsolved
1
vote
0
answers
13
GATE CSE 1988 | Question: 8iv
Consider the following Ada program: Procedure P is BAD-FORMAT: exception Procedure Q is begin ... if S/='b' then raise BAD-FORMAT end if; ... end Q; Procedure R is begin Q; exception when BAD-Format => ... handler body 1 end R; begin ... when BAD-FORMAT => ... handler body 2 end P; Under what conditions are the two handler bodies $1$ and $2$ executed?
go_editor
asked
in
Programming in C
Dec 19, 2016
by
go_editor
499
views
gate1988
normal
descriptive
programming
ada
out-of-gate-syllabus
0
votes
0
answers
14
GATE CSE 1988 | Question: 8iii
Write a LISP function to compute the product of all the numbers in a list. Assume that the list contains only number.
go_editor
asked
in
Programming in C
Dec 19, 2016
by
go_editor
452
views
gate1988
descriptive
programming
lisp
out-of-gate-syllabus
0
votes
0
answers
15
GATE CSE 1988 | Question: 5ii
Briefly explain the term “Configuring a programmable peripheral chip”.
go_editor
asked
in
CO and Architecture
Dec 19, 2016
by
go_editor
272
views
gate1988
normal
descriptive
out-of-gate-syllabus
1
vote
0
answers
16
GATE CSE 1988 | Question: 5i
A ROM has the following time parameters: Maximum Address to valid Data Output delay $= 30$ n sec. Maximum Chip Select to valid Data Output delay $= 20$ n sec. Maximum Data Hold time (after address change or after chip deselect) $= 10$ n ... negligible What is the maximum rate at which a CPU can continuously read data from this ROM? (Show your calculations step-by-step)
go_editor
asked
in
CO and Architecture
Dec 19, 2016
by
go_editor
501
views
gate1988
normal
descriptive
co-and-architecture
unsolved
1
vote
0
answers
17
GATE CSE 1988 | Question: 4i
An $8$-bit data path is to be set up using two $4$-bit ALU's and suitable multiplexers. The ALU's accept two operands $A$ and $B$ on which a total of $16$ operations can be performed. The operand $A$ is from one of two ... a bus. List the data path control signals, and estimate the minimum width of a signal microcode word needed for the generation of these signals.
go_editor
asked
in
CO and Architecture
Dec 19, 2016
by
go_editor
530
views
gate1988
descriptive
co-and-architecture
data-path
unsolved
0
votes
0
answers
18
GATE CSE 1988 | Question: 2xiv
Which of the following features are available in Ada? procedures, monitors, packages, common statement, goto statement, generic unit tasks, backtracking, recursion, exceptions, pragmas, classes.
go_editor
asked
in
Programming in C
Dec 19, 2016
by
go_editor
469
views
gate1988
programming
descriptive
ada
out-of-gate-syllabus
2
votes
0
answers
19
GATE CSE 1988 | Question: 2xi
A modern day machine typically has an atomic TEST AND SET instruction. Why?
go_editor
asked
in
Operating System
Dec 18, 2016
by
go_editor
666
views
gate1988
descriptive
operating-system
process-synchronization
unsolved
0
votes
0
answers
20
GATE CSE 1989 | Question: 12b
Consider a database with the following three relations: CREDITS (STUDENT; COURSE) OFFERS (TEACHER; COURSE) BELONGS (TEACHER; DEPARTMENT) Given below is a code in query language QUEL. Describe in one English sentence the query posed by the given QUEL program. range of s is ... range of e2 is LIST2 range of e3 is LIST3 retrieve(E1.I) where e1.I=e2.I and where e1.I=e3.I
makhdoom ghaya
asked
in
Databases
Dec 15, 2016
by
makhdoom ghaya
516
views
descriptive
gate1989
databases
out-of-gate-syllabus
0
votes
0
answers
21
GATE CSE 1988 | Question: 2iv
Give one property of the field of real numbers which no longer holds when we compute using finite-precision floating point numbers.
go_editor
asked
in
Set Theory & Algebra
Dec 11, 2016
by
go_editor
482
views
gate1988
descriptive
set-theory&algebra
fields
out-of-gate-syllabus
1
vote
0
answers
22
GATE CSE 1988 | Question: 2i
If the transportation problem is solved using some version of the simplex algorithm, under what condition will the solution always have integer values?
go_editor
asked
in
Others
Dec 11, 2016
by
go_editor
388
views
gate1988
linear-programming
descriptive
out-of-gate-syllabus
1
vote
0
answers
23
GATE CSE 1988 | Question: 1vi
An $8212$ in handshake mode of implementation is used in a device controller of a microprocessor-based system. The $8212$ control signals used for the purpose of handshaking are _________ at the microprocessor end, and ________ at the device end.
go_editor
asked
in
Others
Dec 10, 2016
by
go_editor
400
views
gate1988
microprocessors
numerical-answers
out-of-gate-syllabus
0
votes
0
answers
24
GATE CSE 1988 | Question: 1ii
Assuming ideal diodes, the voltage at $V_0$ for circuit in the below figure is _______ (Express the voltage in terms of x, y and z)
go_editor
asked
in
Integrated Circuits
Dec 10, 2016
by
go_editor
406
views
gate1988
integrated-circuits
out-of-gate-syllabus
0
votes
0
answers
25
GATE CSE 1989 | Question: 7
An 8085-based microcomputer consisting of 16 kbytes of ROM, 16kbytes of RAM and four 8-bit I/O ports is to be designed using RAM and ROM chips each of 2 kbytes capacity. The chip to be used for I/O ports realization consists of two 8-bit ports ... memory address space. The I/O locations are to occupy lower order I/O address space. Give memory map and I/O address map.
makhdoom ghaya
asked
in
CO and Architecture
Dec 1, 2016
by
makhdoom ghaya
499
views
gate1989
descriptive
microprocessors
out-of-gate-syllabus
1
vote
0
answers
26
GATE CSE 1989 | Question: 6b
In a certain computer system, there is special instruction implemented to call subroutines. The instruction is JSR Reg.Sub Microsequence: Temp ← Sub SP ← (SP)+2 (SP) ← (Reg) Reg ← (PC) PC ← (Temp) Where Temp is an internal CPU ... would implement co-routine using the JSR instruction. Show the control flow diagram and the contents of the stack before and after the call.
makhdoom ghaya
asked
in
CO and Architecture
Dec 1, 2016
by
makhdoom ghaya
457
views
gate1989
descriptive
co-and-architecture
assembly
unsolved
6
votes
0
answers
27
GATE CSE 1989 | Question: 5b
It is required to implement a stack using bidirectional shift registers providing stack underflow and overflow detection capability. How many shift registers are needed for a stack capacity of $nk$-bit words? Show the schematic diagram of the implementation, clearly indicating all the data and control lines.
makhdoom ghaya
asked
in
Digital Logic
Nov 30, 2016
by
makhdoom ghaya
597
views
descriptive
gate1989
digital-logic
sequential-circuit
shift-registers
unsolved
0
votes
0
answers
28
GATE CSE 1989 | Question: 4-xiii
Provide short answers to the following questions: Consider the following sequence of UNIX commands: grep main a.c b.c c.c > grepout & wc < grepout & rm grepout & Why is this not equivalent to the following? grep main a.c.b.c c.c | wc
makhdoom ghaya
asked
in
Operating System
Nov 30, 2016
by
makhdoom ghaya
524
views
descriptive
gate1989
operating-system
shell-script
out-of-gate-syllabus
3
votes
0
answers
29
GATE CSE 1990 | Question: 15b
Complete the following production rules which generate the language:$L= \left\{a^{n} b^{n} c^{n}\mid a, b, c \in \Sigma \right\}$ where variables $R$ and $Q$ ... $Q \rightarrow R'c$ $cR' \rightarrow ...$ $bR' \rightarrow ...$ $aR' \rightarrow a...$
makhdoom ghaya
asked
in
Theory of Computation
Nov 26, 2016
by
makhdoom ghaya
696
views
gate1990
descriptive
theory-of-computation
grammar
context-sensitive
out-of-gate-syllabus
1
vote
0
answers
30
GATE CSE 1990 | Question: 14
The following algorithm (written in pseudo-pascal) work on an undirected graph $G$ program Explore (G) procedure Visit (u) begin if Adj (u) is not empty {comment:Adj (u) is the list of edges incident to u} then begin Select an edge from ... that each vertex can be accessed and removed from LIST in constant time. Also, show that all edges of the graph are traversed.
makhdoom ghaya
asked
in
Algorithms
Nov 25, 2016
by
makhdoom ghaya
633
views
gate1990
descriptive
graph-algorithms
unsolved
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