instruction size 16 bit.
memory 128 word -> 128=2^7 so address field size is 7 bit.
Part-2. Option C
<-----------------16 bit------------------>
exited instruction is two address field and size of one address field is 7 bit so 7+7=14 bit required for address field in two address field instruction now remaining 2 bit because the instruction is 16 bit -14 bit =2 bit
so the opcode is 2 bit, the total number of operation can be supported is 2^2=4 for two address field instruction.
but given that there is only 2 two address field instruction. so free opcode is 4-2=2 we can use it for one address field instruction.
free opcode is 2 |
7-bit opcode |
7-bit address field |
how many one address field instructions, one address field requires 7 bit for address field and instruction is 16 bit so remaining bits are 9 bits but 2 bits used for 2 address field instruction but above we can see there is 2 free opcode in 2 address field instruction.
remaining 7 bits plus 2 free opcodes by this we can calculate the total number of one address instruction are 2*2^7=256 so answer is 256 one address field instruction
Part-1 Option B is correct.
checking options
A). 1 to 3 and 128 to 364
In the Part-2 answer, we can see there are 4 two address field instruction can be supported but given range 1 to 3 so
when 1 two address field instruction remaining free opcode is 3 so number of one address instruction can be 3*2^7= 384
when 2 free opcodes 2, 2*2^7=256
when 3 free opcodes 1,1*2^7=128
so the range of one address instruction should be 128 to 384 but given 128-364 so it fails.
B). its correct explanation above.