Questions by amarVashishth / GATE Overflow for GATE CSE

6 votes

3 answers

21

Find canonical cover for the given set of functional dependencies.
Consider the following set of functional dependency on the scheme (A, B,C) A→BC, B→C, A→B, AB→C The canonical cover for this set is: A. A→BC and B→C B. A→BC and AB→C C. A→BC and A→B D. A→B and B→C

Consider the following set of functional dependency on the scheme (A, B,C)A→BC, B→C, A→B, AB→CThe canonical cover for this set is:A. A→BC and B&r...

10.5k views

asked Jul 25, 2015

4 votes

2 answers

22

Time Complexity of a Custom Quick Sort Design
Given an instance of custom quick sort in which the Pivot element is always the $\left( \frac{n}{4} \right)^{th}$ ... is the time complexity of this Custom Quick Sort? A) $\mathcal{O}(n\log{}n)$ B) $\mathcal{O}(n^2)$

Given an instance of custom quick sort in which the Pivot element is always the $\left( \frac{n}{4} \right)^{th}$ smallest element. GIven a large array as input and an im...

774 views

asked Jul 21, 2015

3 votes

2 answers

23

Cache Memory and Arrays
Given an array A[100] of which each element size is 4 words. Processor uses a Cache Memory which is divided into 4 lines each of size 8 words to execute the following code for(i=0; i<100; ++i) { A[i] = A[i] + 10; } What is ... I needed to extract from this question is : for calculation of hit ratio do we count a write operation as Hit or only Read operations are counted

Given an array A[100] of which each element size is 4 words. Processor uses a Cache Memory which is divided into 4 lines each of size 8 words to execute the following cod...

2.2k views

asked Jul 8, 2015

8 votes

6 answers

24

Average Access time in Memory Organization
Consider a Processor with two Caches which it can access directly in parallel $L_1$(80% hit rate) and $L_2$(90% hit rate) with access times as 100ns and 200ns respectively. In case of miss in any of those it fetches the data from hard disk $L_3$(100% hit rate) which has a latency of 500ns. What is the average access time($T_{avg}$) of the organization?

Consider a Processor with two Caches which it can access directly in parallel $L_1$(80% hit rate) and $L_2$(90% hit rate) with access times as 100ns and 200ns respectivel...

4.3k views

asked Jul 8, 2015

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title	title:apple
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score	score:10
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