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Recent questions tagged paging

1 vote

1 answer

211

Real World Example of Paging
Processor:- 32 bit with 4 KB page size. RAM: - 4 GB with 220 frames in the RAM. Process:- > Process Name - MOTO GP > Process Size - 1GB > Frame Size - 4 KB // As frame size is always equal to page size. > Number of ... for other processes like NFS Shift 2 which is approx of 7 GB, I think which introduces the concept of virtual memory but don't know how?

Shubhanshu asked in Operating System Aug 14, 2017

1.7k views

8 votes

1 answer

212

junaid ahmad asked in Operating System Aug 8, 2017

by junaid ahmad

708 views

5 votes

1 answer

213

Multilevel TLB performance
A computer has a 128-entry $L_1$ TLB, 1024-entry $L_2$ TLB, and uses page size of 4KB. A program reads a 1MB array, one byte at a time from start to end, 10 times. Assuming the TLBs are directly mapped and initially empty, and no other memory is accessed, find TLB hits and misses of both $L_1$ and $L_2$ TLB (array is page aligned).

habedo007 asked in Operating System Aug 8, 2017

956 views

3 votes

2 answers

214

Paging Operating Systems

mystylecse asked in CO and Architecture Aug 6, 2017

3.4k views

2 votes

1 answer

215

Related to page frame
n a 32 bit processor the virtual address is 22 bit:12 bit(Table index : Offset). What is the size of the page frame and the process page table assuming that each entry in the page table is 4 Bytes?

Sneha bhusare asked in Operating System Aug 6, 2017

by Sneha bhusare

1.3k views

1 vote

1 answer

216

#MemoryManagement
suppose we have a memory system with 32 bit virtual addresses and 4KB pages.If the 20 level paging is used and the memory required to store all the page tables if page table entry size is 4bytes is 2^a(2^b-1)bytes then a*b is

S Harika asked in Operating System Jul 26, 2017

822 views

1 vote

1 answer

217

Virtual memory Video Lecture Suggested by GO Videos (Page Table Entry Computation)
I was watching this video lecture suggested by GO videos playlist and can't get my head around the Page Table Entry(PTE) computation According to the video @ 3:46 the author points a question saying " ... 4 Million But the instructor says it's 1 Million Please let me know where im i going wrong Thanks

Salazar asked in Operating System Jul 25, 2017

408 views

8 votes

2 answers

218

OS PAGING William stallings
Consider a virtual memory system with 32-bit virtual addresses and 1 KB pages. Each page table entry requires 32- bits. It is desired to limit the page table size to one page. How many levels of page tables required? Also find the size memory ... solution. I am weak in understanding these concepts. Answer for the first one is 3 and for the second one is 8208 bytes.

humblefool asked in Operating System Jul 19, 2017

9.4k views

1 vote

1 answer

219

VIrtual Paging :Basic Question
If we say virtual address is 34 bit and we use 3 level page table. 12 bits page offset. first level page table =9 bits second level page table = 5 bits third level page table =8 bits. My question is in third level page table there is 2^8 entries what is meant by second level page and first level page table ? If possible please draw diagram .

hem chandra joshi asked in Operating System Jul 12, 2017

by hem chandra joshi

495 views

4 votes

3 answers

220

OS - Virtual Memory - Valid-Invalid Bit vs Modify Bit [DOUBT]
I am trying to understand the difference between the valid-invalid bit and the modify bit in paging My current understanding is that the valid invalid bit is in the page table and indicates whether that page has ... Is this a correct understanding? Particularly the locations where these are present? Any other insights are gladly accepted

vaibhav101 asked in Operating System Jul 11, 2017

3.6k views

1 vote

0 answers

221

Tanenbaum os book

bmbbarath asked in Operating System Jul 1, 2017

540 views

0 votes

0 answers

222

Paging
Who determines the size of the page table (or to be precise size of virtual address space) for any process? is it operating system or ISA or something else?

Subha Banerjee 2 asked in Operating System Jun 29, 2017

by Subha Banerjee 2

421 views

4 votes

2 answers

223

ISRO2017-52
Given reference to the following pages by a program 0,9,0,1,8,1,8,7,8,7,1,2,8,2,7,8,2,3,8,3 How many page faults will occur if the program has three page frames available to it and uses an optimal replacement? 7 8 9 None of the above

sh!va asked in Operating System May 7, 2017

by sh!va

5.4k views

0 votes

1 answer

224

Self Doubt in Page fault
Small doubt, We know that, when a page fault(required page is missing in main memory) occurs, the respective process will be blocked (Process is removed from Main memory. Does the page table of this process is removed from main memory?? If so, once ... Page Table has to be loaded back.(If it is removed once a process is blocked). Is my understanding correct? Please help me

AnilGoudar asked in Operating System Apr 30, 2017

303 views

1 vote

1 answer

225

galvin
when and why are segmentation and paging sometimes combined into one scheme?

iarnav asked in Operating System Apr 29, 2017

by iarnav

898 views

1 vote

1 answer

226

frame size != page size
Consider a system with 2 level paging applicable the page table is divided into 8K pages each of size 16KB. The memory is byte addressable if the physical address space is 128 MB which is divided into 4KB frames. The page table entry size of outer page table ... bits. What will be the page table size of inner and outer page table. How can frame size and page size be unequal?

Pankaj Joshi asked in Operating System Feb 8, 2017

by Pankaj Joshi

2.8k views

0 votes

0 answers

227

Memory management

naveen81 asked in Operating System Feb 1, 2017

1.1k views

1 vote

2 answers

228

PTE- paging
consider a paging system with 48bit virtual address space.Each address defers to a byte in memory.suppose the size of page is 16KB and the main memory size is 16GB.The minimum size of page table with each entry need 2 protection bits is _____ (in GB) now what should be ... . should i round it to 3bytes and make answer as 48GB or shuld i keep it as it is and write the answer as 44GB?

Anusha Motamarri asked in Operating System Jan 28, 2017

by Anusha Motamarri

851 views

1 vote

1 answer

229

Test Book
A process P has three sections namely text, heap and stack and if the size of the page table is 2 MB then on an average, amount of unused page space per process is: (in MB) what does the question even mean?

Pankaj Joshi asked in Operating System Jan 21, 2017

by Pankaj Joshi

467 views

0 votes

0 answers

230

What is the difference of address of data on the size of page table like in this question?
In a 32-bit machine we subdivide the virtual address into 4 segments as follows: 10-bit 8-bit 6-bit 8 bit What is the size of a page table for a process that has a code segment of ... segment of 600K starting at address 0x80000000 and a stack segment of 64K starting at address 0xf0000000 and growing upward?

Mandeep Singh asked in CO and Architecture Jan 19, 2017

by Mandeep Singh

319 views

1 vote

1 answer

231

Operating System

Çșȇ ʛấẗẻ asked in Operating System Jan 18, 2017

by Çșȇ ʛấẗẻ

384 views

1 vote

0 answers

232

tlb segmentation paging
Consider a memory system consists of a single external cache with an access time of 30ns and a hit rate of 0.85, and a main memory with an access time of 80ns. Now we add virtual memory to the system. The TLB is implemented internal to the processor chip and takes ... memory access time of the system with virtual memory?( Marks: 0.00 ) 8ns 30ns 40ns 51ns

Neal Caffery asked in Operating System Jan 17, 2017

by Neal Caffery

911 views

1 vote

3 answers

233

TLB paging
Consider a system with 2-levels of paging and a TLB with hit rate of 95% and TLB access time of 1ns. Find the effective memory access time if there’s a data cache whose hit rate is 85% and cache access time is 1ns, and main memory access time is 100ns. 100ns. 27ns 25ns 30ns 20ns

Neal Caffery asked in Operating System Jan 17, 2017

by Neal Caffery

3.7k views

0 votes

0 answers

234

Test book
I think it's 64B block but still I'm not sure how to get the answer please provide a full explanation

Pankaj Joshi asked in Operating System Jan 16, 2017

by Pankaj Joshi

409 views

0 votes

0 answers

235

TestBook
The question is: 46 bit virtual addressing system uses 3 level paging.Page table entry size=32 bits. Size of the page table is 1 page.The processor uses 1 MB, 16 way set associative cache with 64 block. What is the size of page table? 1) 2KB 2) 4KB 3) 8KB 4) 16KB My answer: 16KB Actual answer: 8KB Plz explain.

Sushant Gokhale asked in Operating System Jan 16, 2017

by Sushant Gokhale

328 views

6 votes

2 answers

236

TLB and paging
Consider the following piece of code which multiplies two matrices: int a[1024][1024], b[1024][1024], c[1024][1024]; multiply() { unsigned i, j, k; for(i = 0; i < 1024; i++) for(j = 0; j < 1024; j++) for(k = 0; k < ... requires 4 bytes for storage. Compute the number of TLB misses if the page size is 4096 and the TLB has 8 entries with a replacement policy consisting of LRU.

sushmita asked in Operating System Jan 5, 2017

1.1k views

3 votes

0 answers

237

paging
A computer system has a 36-bit virtual address space with a page size of 8K, and 4 bytes per page table entry. What is the maximum size of addressable physical memory in this system? doubt- How to determine physical memory when only logical address space is given?

sushmita asked in Operating System Jan 5, 2017

1.1k views

9 votes

2 answers

238

multilevel paging
In a 32-bit machine we subdivide the virtual address into 4 segments as follows: 10-bit 8-bit 6-bit 8 bit We use a 3-level page table, such that the first 10-bit are for the first level and so on. What is the size of a page table for a process that has 256K of memory starting at address 0? How to solve such questions?? please someone answer it with proper explanation

sushmita asked in Operating System Jan 4, 2017

3.3k views

2 votes

1 answer

239

What is teh use of valid-invalid bit in pagevtable entry?
When the valid – invalid bit is set to valid, it means that the associated page : a) is in the TLB b) has data in it c) is in the process’s logical address space d) is the system’s physical address space

sh!va asked in Operating System Dec 28, 2016

by sh!va

3.9k views

4 votes

4 answers

240

Virtual Address paging
A certain computer provides its users with a virtual address of $20$ bits, the physical address of $32$ bits. The system uses demand paged environment with page size is $4K$ bytes. Find the corresponding physical address of the virtual address $0x12345$. Consider first $20$ pages fit in frames starting from $10$ to $30$ frames and frame index start with $0$.

dd asked in Operating System Dec 22, 2016

by dd

806 views

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Recent questions tagged paging