GATE CSE 2013 | Question: 28

Question

Consider the following sequence of micro-operations.

MBR ← PC  
MAR ← X  PC ← Y  
Memory ← MBR

Which one of the following is a possible operation performed by this sequence?

• A. Instruction fetch
• B. Operand fetch
• C. Conditional branch
• D. Initiation of interrupt service

Comments

most welcome

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https://cnx.org/contents/[email protected]:mur-kqun@1/Module-6-Control-Unit-Operation
Good read

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Good read : https://www.scesasaram.in/wp-content/uploads/2020/04/CSE_4_COA_2_Control-Unit.pdf

Answer 1

Here PC value is being stored in memory which is done when either CALL RETURN involved or there is Interrupt. As, we will have to come back to execute current instruction.

So, options (A), (B) are clearly incorrect.

Option (C) is incorrect because conditional branch does not require to save PC contents.

Option (D) is correct as it matches the generic Interrupt Cycle : 

 

$$\text{Interrupt Cycle:}$$

$$\begin{array}{lcl}
t_1:&\text{MBR}&\leftarrow(\text{PC})\\
t_2:&\text{MAR}&\leftarrow(\text{save-address})\\
&\text{PC}&\leftarrow(\text{routine-address})\\
t_3:&\text{Memory}&\leftarrow(\text{MBR})\\
\end{array}$$

Comments

basic rules which holds true for any cycle :

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First and fourth clearly says that the control flow is not sequential and the value of PC is stored in the MBR (memory), so that the control can again come back to the address where it left the execution. Also in conditional branch we need to update PC but in instruction it is not mentioned. So therefore interrupt only.

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@Himanshu1  @Arjun Sir Can you pls ellaborate more about, the cases of branch instruction in which, we have to store the pc contents ,

(or provide a good source for it )

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This is clearly given in Hamacher (probably any other standard CO book too)

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If subroutine calling would have been in the options, would it also have to be the answer?

 

In case of subroutine calling we store the contents of the PC as “return address” on the stack, which resides on the Main Memory. So we have to infact store the contents of PC in some memory location.

Am I thinking right?

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https://www.geeksforgeeks.org/branching-instructions-8085-microprocessor/

But CALL and RETURN are conditional as well as none conditional both. So option C should also be correct.

@Arjun @Himanshu1 sir

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@Divyanshu Shukla, 

I think that’s why it is not correct.

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@Pranavpurkar
what is MBR??

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@JAINchiNMay

it is Memory buffer register or memory data register , in which the data is stored before sending or receiving to/from memory.

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Thanks buddy!!

Answer 2

- whenever the word fetch is used instruction register was associated as there is no instruction reg. so (A) is not our answer.

- operand fetch says you have to get operand from the memory and place it into the memory data register so source should be the memory and destination should be memory data register so there no such operation is given so (B) is not our ans.

- in conditional branch or Unconditional branch you are able to place new value into the program counter but here it is doing one extra thing it is placing the old value of program counter into the memory so (C) is not our ans.

so our ans is (D)

Answer 3

PC holds the value of the next instruction to be executed we store the value of PC to the MBR and then to the memory .We are saving the value of PC in memory and new address value(routine address) is loaded in to the PC as interrupt is there as we have already save the PC in to the memory then why we are adding another address in to the PC. This can be done only in the Interrupt Services.

option (d) is correct

Answer 4

The interrupt cycle starts when there arises an interrupt signal. The PC has the address of the next instruction of the program that has to be executed next. The content of PC i.e. address of the next instruction that has to be executed is transferred to MBR. Now the content of MBR is written to a special memory location the address of which is loaded into MAR. Now the PC is initialized with the first instruction of interrupt service routine, this program’s services the occurred interrupts.