Register renaming is the solution for WAR and WAW.....
main problem WAR is like this...
1.R1+R2->R3
2.R0+Ri->R1....here if second instruction is executed before 1st then it would lead a problem......now if we rename the register R1 with Rtemp and store the result of 2nd instruction in Rtemp and later after the Write back phase of 1st instruction we can store the value of Rtemp to R1 and it would not lead any conflict...
similerly for WAW