clock cycles to access ALU and Register in Base Index addressing mOde

Question

How many cycles will be required to fetch an operand if we are using "BASE INDEX' addressing mode, and ALU computation takes 2 cycles, register reference takes 1 cycle and memory reference takes 4 cycles each respectively   ?

Comments

7  ?

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Yes, But could you please elaborate the solution, I was getting 10 (2 register references 1 for base register and 1 for index register, 2 ALU computations(base+index+instruction offset),1 memory reference).
Please correct where I am wrong in my approach.

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I did like this

1 : Ref to base reg + 2 : Add address provided in instruction to base reg and calculate effective address + 4 : Fetch the word from the address