IIT Kanpur

Question

Consider a processor with a six-stage pipeline: instruction fetch (IF), instruction decode (ID), register fetch (RF), execution (EX), data memory access (DMEM), register writeback (WB). The processor has no branch predictor and the instruction fetcher stalls after fetching a branch instruction until the branch condition and the target are available at the end of the EX stage. Assume that the instruction fetcher can identify branch instructions before they are decoded in the ID stage. If a program has 30% branch instructions, the loss in CPI due to branch-related stalls is ________

Comments

zero???

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Don't know the answer. IIT kanpur didn't provide us with the answer key

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Branch Penalty =3

Average stalls per instruction = .70*0+.30*3=.90

Average CPI with branch instructions = 1.90

Ideal CPI of Pipeline =1

Now due to branch we need on average .9 CPI more for one instruction.So .90 CPI will be loss in CPI due to branch instructions

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Why did you consider stall of 3 for branch instructions, when it is given that "the instruction fetcher can identify branch instructions before they are decoded in the ID stage".. shouldn't it be 1 in that case ?

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Answer should be zero ..

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 Arunav Khare  instruction fetcher can identify whether fetched instruction is branch instruction or not before they are decoded in the ID stage.But don't know the branch address.It can be obtained only after EX stage.

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If there are 3 stall cycles, CPI should be 4, and not 3

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Ok, my bad. You have considered the penalty in terms of stall cycles.

We can also consider it directly in terms of Average CPI as,

0.70*1 + 0.30*4 = 1.90

I guess 0.90 should be the correct answer

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here we should use formula (1+stall cycle*stall frequency)*cycle time

right?

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I think it should be $90$%

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how?

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Because the ideal CPI is 1, but the CPI obtained under branch condition is 1.90 which means we are providing .90 extra cycle time to branch instruction. which is 90% of the ideal CPI.