GATE CSE 2010 | Question: 32

Question

In the sequential circuit shown below, if the initial value of the output $Q_1Q_0$ is $00$. What are the next four values of $Q_1Q_0$?

 

• A. $11$, $10$, $01$, $00$
• B. $10$, $11$, $01$, $00$
• C. $10$, $00$, $01$, $11$
• D. $11$, $10$, $00$, $01$

Comments

I think, timing diagrams are best way to solve problems of asynchronous counters.

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If see option clearly Q₀ must be toggle on each clock, only option a is showing this 

i.e. 0->1->0->1->0->1

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closer look :

when q1q0= 00 then next state 11 ( T1 T2 = 11 )

option b and c discard

now option D say after 00 --> 01 this  is  no possible  

so answer A

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when clock is 1 (+ve edge) then why can’t I) Q0 value is zero hence clock for FF2 is 0 then Q1=0 and ii) clock is 1 hence FF1 toggles and Q0=1. i have seen some previous problems where when we apply clock=1 to FF1 then for FF2 previous value of Q0 is considered as both occur at same time.

My question is why are we waiting for Q0 to become 1 and then give the output to FF2 whereas FF2 can take Q0=0 while the clock is being changed to 1?  

Answer 1

Option A.

$2^{nd}$ flip-flop will be active only when $1^{st}$ flip flop produces output $1.$ For clocks $2$ and $4$ old output is retained by Flip-Flop $2$.

$\begin{array}{c|c}T&Q_{n+1}\\\hline 0&Q_n\\1&\overline{Q_n}\end{array}$$\underset{\text{For rows 2 and 4, Clk for $T_1$ is 0 and hence old o/p is retained}}{\begin{array}{cc|cc}T_0&Q_{0}&T_1&Q_1\\\hline &0&&0\\\hline 1&1&1&1\\1&0&1&1\\1&1&1&0\\1&0&1&0\end{array}}$ $\begin{array}{c|c}Q_1&Q_{0}\\\hline1&1\\1&0\\0&1\\0&0\end{array}$

Comments

Oh! got it. thanks @Cristine

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It is an Asynchronous counter.

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here which one is q0, left or the right

Answer 2

answer - A

Initially Q0Q1 = 00

after first clock signal Q0 will be toggled and change to 1. It will activate clock of second FF in sequence and toggle that one as well.

Hence next output Q0Q1=11

Similarly next few sequences for Q0Q1 will be 01, 00

Hence answer sequence Q1Q0 will be 11,10,01,00

Comments

T flip flop on 1 toggle the input.

So on Qo  =  1, Second flip flop receive 1 and toggle its output so it becomes also 1. So 11 is generated.

next Qo = 0 (again toggles its output) and 2nd flip flop recieve it and perform no change so Q1 = 1 unchanged. SO 10 generated.

In this fashion so on.

logic is on each edge trigger, 1st flip flop toggles and when 1st ff give 1 opt next ff will toggle otherwise it will remain unchanged. Very easy.

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@kunal_chalotra , Sorry for late reply saw ur message right now only.
This might be helpful . Nice video . worth for 5 min :)
https://www.youtube.com/watch?v=Pi_MHyMoenA

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its k @pc  :)

Answer 3

Since, Flip Flop T₀ is clocked directly from main clock, Q₀ will make transitions(toggle as it's T input is 1) whenever the clock pulse goes from 0 to 1 as flip flops are positive edge triggered.

Flip Flop T₁'s clock is depending on output of Flip Flop T₀ which is Q₀. Hence, whenever Q₀ makes a transition from 0 to 1,Q₁, will also make transition(toggle as it's T input is 1) .

As it it clear from timing diagram, the next four values of Q1 Q0 are 11, 10, 01 , 00. Ans (a)

Answer 4

Asynchronous circuit, please correct me if iam wrong,.