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A computer with a 5 stage pipeline deals with conditional branches by stalling for the next 3 cycle after hitting one. how much does stalling hurt the performance is 20% of all instructions are conditional branches.
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CPI of the architecture= $\underbrace {1}_{\text{ideally pipeline will take 1 cpi}}+\underbrace{\text{stall freqency} \times \# \text{of stalls}}_{\text{performance hurted due to stalls }}$

$=1+0.20 \times 3=1.60$

hence $0.60 $due to stalling  will  hurt the performance or $60 \%$

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