What events happen when we say that a cache at level i is accessed.
My understanding is the following events occur in the duration of an access time:
- The level i cache memory's RAM is accessed using the data bus.
- The cache RAM loads the required data in the data bus.
- The data on the data bus is stored in the level (i-1)th cache.
Is my understanding correct? Is there anything else which happens in the access duration?
Do we include any extra time for STORING the data in the level (i-1)th cache as is done here ?
