Applied Test Series

Question

Consider a memory system that uses a 32-bit address to address at the byte level, plus a cache that uses a 64-byte line size. Assume a four-way set-associative cache with a tag field in the address of 9 bits. The total number of cache lines/ blocks in the cache are_____

 

Answer 1

Given,

line size = Block size (Bs) = $64$ Byte = $2^{6}$ Byte

Physical Address (PA) = $32$ bits

Tag = $9$ bits

4-way set associative

---

PA (32)

Tag(9)	SLO(x)	BO(6)

Here,

set line offset (SLO) = $log_{2}(Total sets)$

Block offset (BO) = $log_{2}(BS)$ = $log_{2}(2^{6})$ = $6$ bits

---

SLO = $32 – (9 + 6)$ = $17$ bits

$log_{2} (Total sets)$ = 17

Total sets = $2^{17}$ 

$\frac{Total\ CMblock}{4\ way\ set \ associative}$ =  $2^{17}$ 

$\frac{Total\ CMBlock}{4}$ = $2^{17}$ 

Total CM Block = $2^{17} * 4$ =  $2^{19}$  = $512$ K Blocks present