Performance

Question

Answer 1

FOR 1ST CASE= TOTAL TIME=1+STALL CYCLE*STALL FREQUENCY

                                              =1+1*0.20( SINCE ONE DELAY SLOT)

                                              =1.2

FOR 2ND CASE= IT IS GIVEN THAT COMPILER IS ABLE TO USE 85 % OF THE DELAY SLOT IT MEAN THERE WILL BE NO STALLS FOR THIS CASE...BUT FOR THE REMAINING 15% THERE WILL BE ONE STALL

                  TOTAL TIME=1+(0.20*.85*1*0+0.20*.15*1)

                                     1+0.03=1.03

THEREFORE GAIN=(1.2-1.03)1.2=14.166%