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A half adder is implemented with XOR and AND gates. A full adder is implemented with two half adders and one OR gate. The propagation delay of an XOR gate is twice that of an AND/OR gate. The propagation delay of an AND/OR gate is $1.2$ microseconds. A $4$-bit-ripple-carry binary adder is implemented by using four full adders. The total propagation time of this $4$-bit binary adder in microseconds is ______.
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In Ripple carry adder, a stage doesn’t wait for the “full output” of previous stage. It only waits for the previous stage’s carry to reach to itself. Now, carry generated by our current stage can be written in 2 ways:-           

  1)Carry generated= $xy + $ $(x$$\bigoplus$$y)C_{in}$                2)Carry generated=  $xy+yC_{in} +xC_{in}$       where $C_{in}$ is carry received by our current stage

Using 1st way, delay in carry generation would be 4.8$us$  and  by using 2nd way, delay in carry generation would be 2.4$us$. So, answer should be according to 2.4$us$ delay(better than 4.8$us$ delay).

So, total delay will be $(4-1)*2.4 + 4.8$ = $12us$

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what will be the answer if it is carry look ahead adder?
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@swami_9

I think it will be $4.8\mu s$ only, as there is no need to wait for the carry from the prev. adder.

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12 Answers

145 votes
145 votes

$S1$ should wait for $C1$ to be ready. Delay for generating $C$ is $1$ EXOR $+ 1$ AND $+ 1$ OR $= 2.4 + 1.2 + 1.2 = 4.8\;\mu s$

Delay for sum is XOR + XOR $= 2.4 + 2.4 = 4.8\;\mu s$

But for the second adder, there the first EXOR can be done even before waiting for the previous output. So, we can get the sum in Another $2.4\;\mu s$ and carry in another $2.4\;\mu s$. In this way, $4\text{-bit}$ sum can be obtained after

$4.8\;\mu s + 3 \ast 2.4 \;\mu s = 12\; \mu s.$

But the question says we use ripple-carry adder. So, each adder must wait for the full output from the previous adder. This would make the total delay $= 4 \ast 4.8 = 19.2\;\mu s$ and this is the key given by GATE, so obviously they meant this. 

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@Ayush Upadhyaya, @Arjun sir I think there is no problem in applying the concept of parallelism and answer can be 12. Please tell me weather I am correct or wrong

Source:- https://youtu.be/YBY0k5mIQy0

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 Isn't the answer should be 12 micro sec here?  Rippling effect doesn't mean whole of the adder will become active after receiving the input from the previous adder,  as long as the second adder is dependent on the previous adder it is still considered to be rippling effect.  Correct me sir, maybe nobody challenged this question in 2015 and this is why gate authorities didn't change it to 12 micro sec that year.   @GO Classes 

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42 votes
42 votes
Ans is 12 ns
 

It took me a while but here's how it is :

The first carry and sum will be available after 4.8 ns. This should be straight forward.

However, for the subsequent stages, you need to keep in mind that the output of half adders is already there at 2.4 ns. So in a sense, it is already computed. The remaining half adder for each full adder is just waiting for the previous carry, which when available from the previous stage can be processed in 2.4 ns. So each next stage will take only 2.4 ns each.

The catch here is that half of the output in each next stage is already computed, only half needs to be processed.
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https://electronics.stackexchange.com/questions/153650/delay-in-4-bit-ripple-carry-adder
I see what you did there :p
Oh and btw, your very first solution is the correct one, It's according to Gate's official answer key... 

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"The remaining half adder for each full adder is just waiting for the previous carry, which when available from the previous stage can be processed in 2.4 ns. So each next stage will take only 2.4 ns each."

yes..but the previous carry will be available after another 2.4ns and then second XOR will happen which will take another 2.4ns. In total it will take 4.8ns
 

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16 votes
16 votes

Seeing the circuit in this way is easy way to get to the answer.

11 votes
11 votes

 

This should be the right procedure to get the right answer for this question.

Simply putting the formula here won't work.

Therefore, the answer comes out to be 12 microseconds.

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3 Comments

Finally is this the right answer?
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Yes! This is the perfectly right answer.
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Thanks bhaiya Really amazing answer .
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