GATE CSE 1990 | Question: 1-v

Question

Under paged memory management scheme, simple lock and key memory protection arrangement may still be required if the _________ processors do not have address mapping hardware.

Comments

could you suggest any book or any kind of resources to study topic related to this ques in a bit detail?

---

@arjun Sir @bikram Sir Any explanation in support of this answer??

---

This question needs a properly worded answer.

Answer 1

i/o processors because processor will issue address for device controller and if there is no translation hardware then it ain't gonna be peachy.

Comments

I/O mapped I/O - Addresses which are used to represent memory location can also be used to represent I/O. In this mapping, CPU has to issue a seperate signal to show if it wants to access I/O or memory location.

Memory mapped I/O - Addresses used to represent memory location and I/O device are different.

So, I think we can have any of the above. I have given my explanation below let me know if anything is wrong. :) @srestha

Assume a peripheral device(say PD1) wants to write to memory. Since IOP does not have address mapping hardware, CPU does all the work and gives the memory address to IOP. Now, IOP needs to ensure mutual exclusion among the IO devices PD1, PD2 PD3 etc while accessing the memory location. Hence we will need simple lock and key memory protection.

Reference: https://www.studytonight.com/computer-architecture/input-output-processor

PS: This is my request. Someone please edit the answer. India is not a native English speaking country and I think it is better to use Indian English in all the answers (or English used in textbooks and not vernacular English). I had to search for the meaning of "peachy" as I did not know. :(

"then it ain't gonna be peachy" means "then it is not going to be fine"

---

even if i/o processors have address mapping hardware , don’t they still require some synchronization techniques ??

---

best answer 🏆