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Recent questions tagged cache-coherence
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Cache Coherence
A system with 2 cores $C0$ and $C1$ uses Write–invalidate Snoopy cache coherency protocol with $Valid$, $Dirty$ and $Shared$ bits. A program runs on the system where $C0$ writes to $A$ and afterwards $C1$ reads from $A$. This happens for 1000 times. Find number of times system bus is used by the program..
habedo007
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CO and Architecture
May 7, 2018
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habedo007
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co-and-architecture
cache-coherence
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