Login
Register
@
Dark Mode
Profile
Edit my Profile
Messages
My favorites
Register
Activity
Q&A
Questions
Unanswered
Tags
Subjects
Users
Ask
Previous Years
Blogs
New Blog
Exams
Dark Mode
Recent questions tagged integrated-circuits
0
votes
0
answers
1
GATE CSE 1988 | Question: 1ii
Assuming ideal diodes, the voltage at $V_0$ for circuit in the below figure is _______ (Express the voltage in terms of x, y and z)
go_editor
asked
in
Integrated Circuits
Dec 10, 2016
by
go_editor
407
views
gate1988
integrated-circuits
out-of-gate-syllabus
0
votes
0
answers
2
GATE CSE 1987 | Question: 15a
Fig. below shows the circuit diagram of a wien bridge oscillator using an op-amp. The frequency of oscillation is given by $f= 1/2 \pi CR$. To have the system oscillate the ratio $R_{2}/R_{1}$ should be $0.5$ $29$ $2$ Any value
makhdoom ghaya
asked
in
Integrated Circuits
Nov 15, 2016
by
makhdoom ghaya
903
views
gate1987
integrated-circuits
out-of-gate-syllabus
1
vote
0
answers
3
GATE CSE 1987 | Question: 1-I
The most satisfactory LED driver circuit using a TTL gate is:
makhdoom ghaya
asked
in
Integrated Circuits
Nov 7, 2016
by
makhdoom ghaya
568
views
gate1987
non-gate
integrated-circuits
out-of-gate-syllabus
1
vote
1
answer
4
UGC NET CSE | December 2011 | Part 2 | Question: 32
A chip having $150$ gates will be classified as SSI MSI LSI VLSI
makhdoom ghaya
asked
in
CO and Architecture
Aug 19, 2016
by
makhdoom ghaya
759
views
ugcnetcse-dec2011-paper2
co-and-architecture
integrated-circuits
2
votes
1
answer
5
UGC NET CSE | June 2012 | Part 2 | Question: 36
Which of the following logic families is well suited for high-speed operations? TTL ECL MOS CMOS
go_editor
asked
in
Integrated Circuits
Jul 5, 2016
by
go_editor
1.4k
views
non-gate
integrated-circuits
ugcnetcse-june2012-paper2
4
votes
1
answer
6
ISRO2014-46
If the maximum output voltage of a DAC is $V$ volts and if the resolution is $R$ bits then the weight of the most significant bit is ________ $V/(2^R -1)$ $(2^{R-1}).V/(2^R-1)$ $(2^{R-1}).V$ $V/(2^{R-1})$
go_editor
asked
in
Integrated Circuits
Jul 1, 2016
by
go_editor
3.1k
views
isro2014
non-gate
integrated-circuits
3
votes
2
answers
7
ISRO2011-80
Logic family popular for low power dissipation CMOS ECL TTL DTL
go_editor
asked
in
Integrated Circuits
Jun 24, 2016
by
go_editor
3.7k
views
isro2011
non-gate
integrated-circuits
4
votes
3
answers
8
ISRO2008-21
The advantage of MOS devices over bipolar devices is that it allows higher bit densities and also cost effective it is easy to fabricate it is higher-impedance and operational speed all of these
go_editor
asked
in
Integrated Circuits
Jun 12, 2016
by
go_editor
2.8k
views
isro2008
non-gate
integrated-circuits
5
votes
1
answer
9
ISRO2007-35
The output $0$ and $1$ level for TTL Logic family is approximately $0.1$ and $5 \text{ V}$ $0.6$ and $3.5 \text{ V}$ $0.9$ and $1.75 \text{ V}$ $-1.75$ and $0.9 \text{ V}$
go_editor
asked
in
Integrated Circuits
Jun 10, 2016
by
go_editor
3.3k
views
isro2007
digital-logic
integrated-circuits
non-gate
0
votes
0
answers
10
GATE CSE 1994 | Question: 3.10
Match the following items (i) ECL (a) Unipolar; very high speed; difficult to fabricate; good resistance to radiation (ii) Ga As (b) Unipolar; low power; modest speed and packing density (iii) TTL (c) Bipolar; highest speed silicon IC; low packing density (iv) CMOS (d) Bipolar, modest packing density, inexpensive
Kathleen
asked
in
Integrated Circuits
Oct 5, 2014
by
Kathleen
597
views
gate1994
integrated-circuits
out-of-syllabus-now
1
vote
1
answer
11
GATE CSE 1998 | Question: 1.15
The threshold level for logic 1 in the TTL family is any voltage above 2.5 V any voltage between 0.8 V and 5.0 V any voltage below 5.0 V any voltage below V$_{cc}$ but above 2.8 V
Kathleen
asked
in
Digital Logic
Sep 25, 2014
by
Kathleen
3.0k
views
gate1998
digital-logic
integrated-circuits
out-of-syllabus-now
6
votes
3
answers
12
GATE CSE 1991 | Question: 03,i
Choose the correct alternatives (more than one may be correct) and write the corresponding letters only: (i). The advantages of CMOS technology over a MOS is: (A). lower power dissipation (B). greater speed (C). smaller chip size (D). fewer masks for fabrication (E). none of the above
Kathleen
asked
in
Digital Logic
Sep 12, 2014
by
Kathleen
1.6k
views
gate1991
digital-logic
integrated-circuits
out-of-gate-syllabus
To see more, click for the
full list of questions
or
popular tags
.
Subscribe to GATE CSE 2024 Test Series
Subscribe to GO Classes for GATE CSE 2024
Quick search syntax
tags
tag:apple
author
user:martin
title
title:apple
content
content:apple
exclude
-tag:apple
force match
+apple
views
views:100
score
score:10
answers
answers:2
is accepted
isaccepted:true
is closed
isclosed:true
Recent Posts
Post GATE 2024 Guidance [Counseling tips and resources]
GATE CSE 2024 Result Responses
[Project Contest] Pytorch backend support for MLCommons Cpp Inference implementation
Participating in MLCommons Inference v4.0 submission (deadline is February 23 12pm IST)
IIITH PGEE 2024 Test Series by GO Classes
Subjects
All categories
General Aptitude
(3.5k)
Engineering Mathematics
(10.4k)
Digital Logic
(3.6k)
Programming and DS
(6.2k)
Algorithms
(4.8k)
Theory of Computation
(6.9k)
Compiler Design
(2.5k)
Operating System
(5.2k)
Databases
(4.8k)
CO and Architecture
(4.0k)
Computer Networks
(4.9k)
Artificial Intelligence
(79)
Machine Learning
(48)
Data Mining and Warehousing
(25)
Non GATE
(1.4k)
Others
(2.7k)
Admissions
(684)
Exam Queries
(1.6k)
Tier 1 Placement Questions
(17)
Job Queries
(80)
Projects
(11)
Unknown Category
(870)
64.3k
questions
77.9k
answers
244k
comments
80.0k
users
Recent questions tagged integrated-circuits
Recent Blog Comments
category ?
Hi @Arjun sir, I have obtained a score of 591 in ...
download here
Can you please tell about IIT-H mtech CSE self...
Please add your admission queries here:...