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Answers by Dexter

2 votes

1

Doubt database
What is basic difference between mandatory attributes and multivalued attributes???

answered in Databases Oct 19, 2017

301 views

0 votes

2

Hash function takes a message of arbitrary length and generates a fixed length code

answered in CO and Architecture Oct 19, 2017

418 views

1 vote

3

Question
On a system with N CPU, what is the maximum number of processes that can be in running state ? A) N process B)Depend on the processes in ready state C) Can't say

answered in Operating System Oct 19, 2017

727 views

1 vote

4

Regular expression
What is the regular expression for sigma = {0,1} where each string has odd 0's. Which one is correct? A) 1*0(1*01*01*)* B) 1*01*(1*01*01*)*

answered in Theory of Computation Oct 17, 2017

394 views

7 votes

5

Control Word
A computer has 170 different operations. Word size is 4 Bytes. one word instruction requires two address fields. One address for register and one address for memory. If there are 37 registers then the memory size is ____ (in KB).

answered in CO and Architecture Oct 16, 2017

3.5k views

0 votes

6

microprocessor
Which of the following statement is not correct? (a) We can transfer register to immediate number. (b) We can multiply 8-bit three register is one instruction. (c) 8051 is used for parallel port interface. (d) We can add two immediate numbers using only one ADD instruction. Codes : (c) and (d) (a) and (b) (a), (b), (c) and (d) (a), (b) and (d)

answered in Digital Logic Oct 16, 2017

783 views

0 votes

7

NPTEL
Return value of xchg instruction is_____________ 1. Old value 2. New value 3 . 1 if operation succeeds and 0 if operation fails 4. None of the above

answered in Operating System Oct 16, 2017

468 views

0 votes

8

NPTEL
By using Intel hardware xchg instruction ensures that The critical section is deadlock free Solution is starvation free Process enters CS in FIFO order More than one process enters critical section at same time Which of the above statement is TRUE?

answered in Operating System Oct 16, 2017

730 views

0 votes

9

NPTEL
State True/False Bakery algorithm ensures that no process is starved. 1. True 2. False

answered in Operating System Oct 16, 2017

785 views

1 vote

10

ME test
A byte addressable computer has a small data cache capable of holding 16 32 bit words. Each cache capable of holding 16 32 bit word. Each cache block consists of four 32 bit words. For the following sequence of addresses (in hexadecimal). The miss ratio if 4-way set associative LRU cache is used is ___________ ? 100, 104, 108, 104, 107, 108, 105, 102, 108, 103.

answered in CO and Architecture Feb 20, 2017

514 views

3 votes

11

self doubt
If there are no attributes in common between two relations R and S then, what should be the result of (R natural join S)? 1) R x S 2) $\phi$ I think option 2 because of following definition from Korth:

answered in Databases Feb 20, 2017

401 views

0 votes

12

NPTEL-Internetwork Security-Week2-Quiz-2
Which cipher is commonly used in network-based symmetric cryptographic applications? (A) Linear cipher (B) Block cipher (C) Permutation cipher (D) Stream cipher

answered in GATE Feb 20, 2017

798 views

1 vote

13

Predict serializability of given schedule
S:r1(P),r2(Q),r1(Q),r2(P),w1(Q),w2(P) Predict serializability of given schedule: a) It is view serializable NOT conflict serializble b) It is view serializable but NOT conflict serializble only if P= Q c) It is view serializable and conflict serializble d) It is neither view serializable nor conflict serializble

answered in Databases Feb 20, 2017

402 views

0 votes

14

Subnet Mask
What is the size of subnet mask? No. of bits in subnet mask or No. of subnets possible

answered in Computer Networks Feb 20, 2017

234 views

0 votes

15

Datagram switching and Virtual circuit
I. Datagram switching does not have set up and tear down phases. hence it is faster than virtual circuit approach II. Virtual circuit approach uses simple VC ID to decide next hope rather than complete addressing information. hence it is faster than datagram ... I only b) II only c) I is correct but reason is wrong d) II is correct, but reason is wrong

answered in Computer Networks Feb 20, 2017

1.2k views

1 vote

16

Made Easy Test
Consider the following schedule for transaction T1,T2,T3 r1(x),r2(y),r3(y),w1(x),w3(x),r2(z),w1(x) Also assume that the timestamp for the three transaction is{30,10,20} which of the following statement is true with respect to the above schedule? ANS will be Thomas Write Time Stamp Protocol but not basic time stamp protocol HOW?

answered in Databases Feb 19, 2017

3.0k views

0 votes

17

Made easy test series
Which of the following is true? In 2PL protocol if all exclusive lock are acquired by transactions in only increasing order of their addresses then 2PL protocol is deadlock free. In 2PL protocol if all exclusive lock are acquire by transaction in only increasing order of their addresses then 2PL protocol is starvation free. Both (a) and (b) Neither (a) nor (b)

answered in Databases Feb 19, 2017

651 views

4 votes

18

E R model
why not b) option

answered in Databases Feb 19, 2017

729 views

3 votes

19

MICROPROCESSOR PROGR
how many times the loop will be executed LXI H,0106 H DCR L LOOP :DCX H NZ LOOP HLT a)105 times b) 261 times c) 0 times d) forever

answered in CO and Architecture Feb 19, 2017

1.7k views

3 votes

20

Threads
Since every thread can access every memory address within the process’ address space, one thread can read, write, or even wipe out another thread’s stack. I am not getting the above statement, stack is specific to a thread then how we can access other thread's stack through Process' address space?

answered in Operating System Feb 19, 2017

1.0k views

1 vote

21

which of the following is true..??
Consider the following statements: S1 : Increasing the number of page frames allocated to a process sometime increase the page fault rate in FIFO page replacement policy irrespective of page reference string. S2 : It is not necessary to have loader everytime in main memory. ... S1 is true B) Only S2 is true C) Both S1 and S2 are true D) Neither S1 and S2 are true

answered in Operating System Feb 19, 2017

2.6k views

13 votes

22

GATE CSE 2002 | Question: 1.9
A device employing INTR line for device interrupt puts the CALL instruction on the data bus while: $\overline{INTA}$ is active HOLD is active READY is inactive None of the above

answered in CO and Architecture Nov 20, 2016

9.9k views

1 vote

23

CO 2001
A processor needs software interrupt to (a) test the interrupt system of the processor (b) implement co routines (c) obtain system services which need execution of priviledge instructions (d) return from subroutine

answered in CO and Architecture Nov 20, 2016

776 views

3 votes

24

GATE CSE 1999 | Question: 2.22
The main difference(s) between a CISC and a RISC processor is/are that a RISC processor typically has fewer instructions has fewer addressing modes has more registers is easier to implement using hard-wired logic

answered in CO and Architecture Nov 19, 2016

9.0k views

4 votes

25

GATE IT 2008 | Question: 40
A non pipelined single cycle processor operating at $100\;\text{MHz}$ is converted into a synchronous pipelined processor with five stages requiring $2.5\;\text{nsec}, 1.5\;\text{nsec}, 2\;\text{nsec}, 1.5\;\text{nsec}$ and $2.5\;\text{nsec}$, respectively ... $4.5$ $4.0$ $3.33$ $3.0$

answered in CO and Architecture Nov 19, 2016

13.7k views

10 votes

26

GATE CSE 2006 | Question: 42
A CPU has a five-stage pipeline and runs at $1$ GHz frequency. Instruction fetch happens in the first stage of the pipeline. A conditional branch instruction computes the target address and evaluates the condition in the third stage of the pipeline. The processor stops fetching new ... : $\text{1.0 second}$ $\text{1.2 seconds}$ $\text{1.4 seconds}$ $\text{1.6 seconds}$

answered in CO and Architecture Nov 18, 2016

21.1k views

16 votes

27

GATE IT 2005 | Question: 53
The following$ C$ function takes two ASCII strings and determines whether one is an anagram of the other. An anagram of a string s is a string obtained by permuting the letters in s. int anagram (char *a, char *b) { int count [128], j; for (j = 0; j < 128; j++) count[j] = 0; j ... [j]]++ A: count [a[j++]]++ and B: count[b[j]]-- A: count [a[j]]++ and B: count[b[j++]]--

answered in Algorithms Jun 24, 2016

12.1k views

0 votes

28

logic basic
Express each of these statements using qunatifers .Then form the negation of the statement so that no negation is to left of a quantifier , Next Express the negation is in Simple English (Do not simplify the words "it is the not case that ") ... ) Some students have solved every excercise in this book 5) No student has solved atleast one exercise in every section of this book

answered in Mathematical Logic May 17, 2016

813 views

1 vote

29

Logic basic
Express each of the sentences using predicates , quantifier logical connectives and mathematical operations where the domain consists of all integers 1) The product of 2 negative number is positive 2) The average of 2 positive integers is positive 3) The difference ... negative 4) The absolute value of the sum of integers does not exceed The sum of the absolute values of these integers

answered in Mathematical Logic May 17, 2016

1.3k views

0 votes

30

Logic basic
Express each of these system specification using predicates , quantifier and logical connectives if necessary 1) At least one console must be accessible during every fault condition 2) The email address of every user can be retrived whenever the archieve contain ... the network 5) No one knows the password of every user on the system except system administrator who knows all passwords

answered in Mathematical Logic May 17, 2016

2.3k views

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