GATE CSE 2017 Set 1 | Question: 9

Question

When two $8\text{-bit}$ numbers $A_{7}\cdots A_{0}$ and $B_{7}\cdots B_{0}$ in $2$'s complement representation (with $A_{0}$ and $B_{0}$ as the least significant bits) are added using a ripple-carry adder, the sum bits obtained are $S_{7}\cdots S_{0}$ and the carry bits are $C_{7}\cdots C_{0}$. An overflow is said to have occurred if

• A. the carry bit $C_{7}$ is $1$
• B. all the carry bits $\left ( C_{7},\cdots ,C_{0} \right )$ are $1$
• C. $\left ( A_{7} \cdot B_{7} \cdot \overline{S_{7}}+\overline{A_{7}} \cdot \overline{B_{7}} \cdot S_{7} \right )$ is $1$
• D. $\left ( A_{0} \cdot B_{0} \cdot \overline{S_{0}}+\overline{A_{0}} \cdot \overline{B_{0}} \cdot S_{0} \right )$ is $1$

Comments

repeated concept.

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Overflow condition can be written in any of the three ways – 

1. $C_{n} \oplus C_{n-1}=1$ which says that either 1st MSB or 2nd MSB should give carry but not both.
2. $A_{n}B_{n}\bar{C_{n-1}} + \bar{A_{n}}\bar{B_{n}}C_{n-1}=1$ where $A_n$ and $B_n$ are the MSB (which are sign bits) and $C_{n-1}$ is the carry from the 2nd MSB.
3. $A_{n}B_{n}\bar{R_{n}} + \bar{A_{n}}\bar{B_{n}}R_{n}=1$ where $R_{n}$ is the MSB (sign bit) of result of the addition.

From the third condition above, we can see that overflow will happen when:

 1. $A_n,B_n$ is 0 (which means positive numbers) and $R_n$ is 1 (which means a negative number).

2. $A_n,B_n$ is 1 (which means both are negative numbers) and $R_n$ 0 (which means a positive number).

Conclusion: For overflow to happen, two positive numbers are added and the result is negative OR two negative numbers are added and the result is positive.

PS: 2nd result can be derived from 1st result by replacing the value of $C_n$ with $A_nB_n + C_{n-1}(A_n \oplus B_n)$ and 3rd result can be derived from the 2nd result by thinking a bit. Let me know if you find it difficult to derive it.

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ALL QUESTION ONE SOLUTION NICE  jatinmittal199510

Answer 1

Answer is (C)

Overflow is said to occur in the following cases
$$\begin{array}{|c|c|c|} \hline C_{7} & C_{6} &\text{Overflow} \\\hline0&0&  \text{NO}\\ 0&1& \text{YES} \\  1&0&\text{YES} \\ 1&1&\text{NO}  \\\hline \end{array}$$
The $3^{\text{rd}}$ condition occurs in the following case $A_{7}B_{7}S_{7}',$ now the question arises how? 
$$\begin{array}{|c|c|c|} \hline C_{7} & C_{6} \\\hline  A_{7} &1\\\ B_{7} &1 \\ S_{7} & 0  \\\hline \end{array}$$

NOW, $A_{7}=1$ AND $B_{7}=1, S_{7}=0$ is only possible when $C_{6}=0$ otherwise $S_{7}$ would become $1$.

$C_{7}$ has to be $1 (1+1+0$ generates carry$)$

ON similar basis we can prove that $C_{7}=0$ and $C_{6}=1$ is produced by $A_{7}'B_{7}'S_{7}$. Hence, either of the two conditions cause overflow. Hence (C).

Why not A? when $C_{7}=1$ and $C_{6} =1$ this doesn't indicate overflow ($4^{\text{th}}$ row in the table)

Why not B? if all carry bits are $1$ then, $C_{7}=1$ and $C_{6}=1$ (This also generates $4^{\text{th}}$ row)

Why not D? These combinations are $C_{0}$ and $C_{1}$, the lower carrys do not indicate overflow

Comments

@srestha @ srestha

I think in this question , C0 is carry generated out of full adder 0 , not carry in to full adder 0.

Also there is no C8 mentioned , so C0 to c7 must be cout carries each corresponding to adder 0 to 7

So c0 can be 1 if a0 and b0 are both 1.

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best explanation.

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Simply, the answer is C. The overflow in 2's complement is said to have occurred when:

• Two negative numbers are added and result is a positive number.
• Two positive numbers are added and result is a negative number.

Option (C) implies the above two conditions.

Answer 2

https://en.wikipedia.org/wiki/Overflow_flag

so, C is the ans.

Comments

I think your arrows are pointing to wrong things... interchange them? otherwise good answer! iguess

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Positive operands means A7(0)  B7(0) and S7(1)

Negative operands means A7(1)  B7(1) and S7(0)

Otherwise the ans is perfect..!

Answer 3

Observe one thing, Overflow can occur when we add two negative numbers or two positive numbers. When we add one negative and one positive number, there can't be an overflow.

Now when we add two positive numbers, result should always be positive and when we add two negative numbers, result should be negative, In representation of signed binary numbers, MSB represents sign of number.

1. Now if MSB of both input numbers is 1 (means numbers are negative) but MSB of sum is 0 (means sum is positive) then it means there is an overflow.

2. Similarly, when MSB of both inputs is 0 (means numbers are positive), but MSB of sum is 1 (means sum is negative), then it also indicates overflow.

Statement 1 above indicates, A'₇B'₇S₇ is 1. Statement 2 above indicates A₇B₇S'₇ is 1.

Hence Option C is answer

Answer 4

the solution is  C)

if Both A₇ and B₇ is 1 then C₇ will be 1 and S₇ is 0 means C₆ is 0 hence C₇.C₆'

if Both A₇ and B₇ is 0 then C₇ will be 0 and S7 is 1 means C₆ is 1 hence C₇'.C₆

hence combining both we get C₇.C₆'+C₇'.C₆

which is C₇ XOR C₆ which is condition of detecting  Overflow