Login
Register
@
Dark Mode
Profile
Edit my Profile
Messages
My favorites
Register
Activity
Q&A
Questions
Unanswered
Tags
Subjects
Users
Ask
Previous Years
Blogs
New Blog
Exams
Dark Mode
Finding Control memory address register if cpi and instruction counter is given
Rohit Kumar 2
asked
in
CO and Architecture
Aug 11, 2015
retagged
Nov 13, 2017
by
Arjun
557
views
0
votes
0
votes
Also, memory address bit is given. Control memory address register and control memory data register are to find.
co-and-architecture
Rohit Kumar 2
asked
in
CO and Architecture
Aug 11, 2015
retagged
Nov 13, 2017
by
Arjun
by
Rohit Kumar 2
557
views
answer
comment
Follow
share this
share
0 Comments
Please
log in
or
register
to add a comment.
Please
log in
or
register
to answer this question.
0
Answers
← Previous
Next →
← Previous in category
Next in category →
Related questions
0
votes
0
votes
1
answer
1
hem chandra joshi
asked
in
CO and Architecture
Dec 9, 2017
1,257
views
What is the difference between control address register and control word?
hem chandra joshi
asked
in
CO and Architecture
Dec 9, 2017
by
hem chandra joshi
1.3k
views
co-and-architecture
0
votes
0
votes
0
answers
2
prajabobde
asked
in
CO and Architecture
Aug 19, 2018
275
views
Control sequence to add the contents of memory location whose address is at memory location num to register r1
prajabobde
asked
in
CO and Architecture
Aug 19, 2018
by
prajabobde
275
views
4
votes
4
votes
1
answer
3
yes
asked
in
CO and Architecture
Nov 20, 2015
879
views
The ALU, the bus and all the register are identical in size. the instruction "memory write"
The ALU, the bus and all the register are identical in size. The instruction "memory write" has the register transfer interpretation M[(R1)] ← R2. The minimum number of clock cycles needed for execution cycle of this instruction if memory write completion takes 1 cycle is a) 2 b)3 c)4 d)5
yes
asked
in
CO and Architecture
Nov 20, 2015
by
yes
879
views
co-and-architecture
data-path
12
votes
12
votes
3
answers
4
Tehreem
asked
in
CO and Architecture
Sep 9, 2015
11,748
views
Max number of one address instruction, when two address instruction is given is?
A computer uses expanding opcode. It has 16 bit instructions 6 bit addresses, it supports one address, two address instructions only. If there are n two address instructions, the maximum number of one address instructions are?
Tehreem
asked
in
CO and Architecture
Sep 9, 2015
by
Tehreem
11.7k
views
co-and-architecture
addressing-modes
machine-instruction
instruction-format
Subscribe to GATE CSE 2024 Test Series
Subscribe to GO Classes for GATE CSE 2024
Quick search syntax
tags
tag:apple
author
user:martin
title
title:apple
content
content:apple
exclude
-tag:apple
force match
+apple
views
views:100
score
score:10
answers
answers:2
is accepted
isaccepted:true
is closed
isclosed:true
Recent Posts
Post GATE 2024 Guidance [Counseling tips and resources]
GATE CSE 2024 Result Responses
[Project Contest] Pytorch backend support for MLCommons Cpp Inference implementation
Participating in MLCommons Inference v4.0 submission (deadline is February 23 12pm IST)
IIITH PGEE 2024 Test Series by GO Classes
Subjects
All categories
General Aptitude
(3.5k)
Engineering Mathematics
(10.4k)
Digital Logic
(3.6k)
Programming and DS
(6.2k)
Algorithms
(4.8k)
Theory of Computation
(6.9k)
Compiler Design
(2.5k)
Operating System
(5.2k)
Databases
(4.8k)
CO and Architecture
(4.0k)
Computer Networks
(4.9k)
Artificial Intelligence
(79)
Machine Learning
(48)
Data Mining and Warehousing
(25)
Non GATE
(1.4k)
Others
(2.7k)
Admissions
(684)
Exam Queries
(1.6k)
Tier 1 Placement Questions
(17)
Job Queries
(80)
Projects
(11)
Unknown Category
(870)
64.3k
questions
77.9k
answers
244k
comments
80.0k
users
Recent Blog Comments
category ?
Hi @Arjun sir, I have obtained a score of 591 in ...
download here
Can you please tell about IIT-H mtech CSE self...
Please add your admission queries here:...
Twitter
WhatsApp
Facebook
Reddit
LinkedIn
Email
Link Copied!
Copy
