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tell me if im wrong

in oder to access a page first we look in TLB if present we in look in cache( if present no need to acces main memory) if not we go directly and accses the page with out going to see page tabels if there is a page fault we service the page

if there is a entry in TLB then there will be no page fault
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CACHE- before going to main memory for searching at first physical address is checked in cache if present

TLB- before searching for virtual address in page table TLB is checked if present

so at first TLB if hit use that physical address to search in cache . if cache hit cpu will take it. if not go in memory for it

OR

at first TLB if miss go to page table if hit use the physical address  to acess main menory
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if there is a entry in TLB then there will be no page fault

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1st of all TLB generally to be appropriate its store in cache , and in the TLB the entry is store not the data (i mean frame ) . So if TLB hit then we are getting the physical address of the corresponding logical address ( not the frame ) . Then it will search for that frame in cache then it will be cache hit if not then it will go for MM .

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Why can't we use virtual address for accessing the cache?
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Virtual address ??

TLB stores the address of most frequently uses frames address . 1st it will check those .
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There are 4 types of caches

  1. Virtually Indexed Virtually Tagged
  2. Virtually indexed Physically Tagged
  3. Physically Indexed Virtually Tagged
  4. Physically Indexed Physically Tagged
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you are wrong on many aspects . first of all tlb is the cache of page table . most frequent page table access are present in tlb . NOTE : there may be a miss even though there is a tlb entry. secondly the cache keep most frequently reffered page . so first tlb will be seen if there is a hit i am going to get the frame number directly and then i will visit cache if there is a hit the page is obtained otherwise the page is taken from main memory.
now if tlb is a miss i go to page table which is in the memory to get the frame number then with that frame number i will go to cache and then if it is a hit page is obtained otherwise the page will be fetched from main memory.

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sir clear likha hai one instruction can take 2 memory access.ab memory access hogi to page fault to ho sakta hai na sir . sir app plz line post kar do jisme likha hai page fault is per instruction it is saying . page fault take 8 milli sec , and "" An average instruction takes 100 nanoseconds of CPU time, and two memory accesses"". jis teacher ne question frame kiya hai wo yahi concept soch ke kiya hai you are right . but here the meaning is diffrent . 

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This is also given in question:

"and the page fault rate is one in every 10,000 instructions"

and it is supposed to make the calculation pretty simple. Unfortunately most people are making it more complex. 

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ya got it . thnks . it should be the answer thnks one again sometimes we miss something . i missed that one .
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cache can be virtual  or physical  .If its virtual one then it is placed between processor and MMU ..Mapping is done using virtual address..In case of physical cache is placed between MMU and memory that is address translation is done first to find location of page.. so depending on organisation we have proceed to fin date

 

for more reference u can refer

https://en.wikipedia.org/wiki/CPU_cache

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