After splitting the pipeline, stage delays will be 100,120,100,100,110,150
the cycle time of pipeline = largest phase delay + buffer delay
= 150 + 20 = 170 ns
CPI should be 1 which is the main aim of pipelining...
"Number of instructions can be executed in 1 second is throughput"
1 instruction ---------------- 170 ns
10^9/ 170 Instruction ----------------------- 1 sec
1000 Million/ 170 Instructions -------- 1sec
5.8832 MIPS