Answer is Binary to Gray code.
The D flip flop creates delay of one clock cycle, since the D flip flop is clear initially the 0 XOR b7 will take place of b1 with left shift at same time.
Now the one cycle is completed and D flip flop will give result of previous operation that is b7 (coz in D --> Qn+1 = D) and at this point b6 will be entering D flip flop and one of the input of XOR gate and we have b7 XOR b6 . After that it is easy to understand why it is binary to Gray code.