Login
Register
@
Dark Mode
Profile
Edit my Profile
Messages
My favorites
Register
Activity
Q&A
Questions
Unanswered
Tags
Subjects
Users
Ask
Previous Years
Blogs
New Blog
Exams
Dark Mode
TANCET 2016 Interrupt
Balaji Jegan
asked
in
CO and Architecture
Oct 23, 2018
retagged
Aug 6, 2022
by
Shubham Sharma 2
173
views
0
votes
0
votes
tancet2016
co-and-architecture
interrupts
Balaji Jegan
asked
in
CO and Architecture
Oct 23, 2018
retagged
Aug 6, 2022
by
Shubham Sharma 2
by
Balaji Jegan
173
views
answer
comment
Follow
share this
share
0 Comments
Please
log in
or
register
to add a comment.
Please
log in
or
register
to answer this question.
1
Answer
0
votes
0
votes
4.interrupt start from fixed location $\Rightarrow$ vectored
interrupt can be delayed / rejected $\Rightarrow$ maskable
Dharmendra Lodhi
answered
Oct 23, 2018
by
Dharmendra Lodhi
comment
Follow
share this
0 Comments
Please
log in
or
register
to add a comment.
← Previous
Next →
← Previous in category
Next in category →
Related questions
0
votes
0
votes
0
answers
1
Balaji Jegan
asked
in
CO and Architecture
Oct 23, 2018
157
views
TANCET 2016 COA
Balaji Jegan
asked
in
CO and Architecture
Oct 23, 2018
by
Balaji Jegan
157
views
tancet2016
co-and-architecture
cpu
0
votes
0
votes
0
answers
2
Balaji Jegan
asked
in
CO and Architecture
Oct 23, 2018
171
views
TANCET 2017 INTERRUPT
Balaji Jegan
asked
in
CO and Architecture
Oct 23, 2018
by
Balaji Jegan
171
views
tancet2017
co-and-architecture
interrupts
2
votes
2
votes
2
answers
3
Na462
asked
in
CO and Architecture
Oct 21, 2018
1,702
views
Non Vectored Interrupt
Na462
asked
in
CO and Architecture
Oct 21, 2018
by
Na462
1.7k
views
interrupts
co-and-architecture
io-handling
1
vote
1
vote
1
answer
4
Tuhin Dutta
asked
in
CO and Architecture
Dec 2, 2017
2,941
views
memory address saved on stack after interrupt
Consider that the memory is byte addressable with size 16 bits, and the program has been loaded starting from memory location (2000)10. What will be the return address saved in the stack, if an interrupt occurs while the CPU has been halted after executing the HALT instruction?
Tuhin Dutta
asked
in
CO and Architecture
Dec 2, 2017
by
Tuhin Dutta
2.9k
views
co-and-architecture
interrupts
Subscribe to GATE CSE 2024 Test Series
Subscribe to GO Classes for GATE CSE 2024
Quick search syntax
tags
tag:apple
author
user:martin
title
title:apple
content
content:apple
exclude
-tag:apple
force match
+apple
views
views:100
score
score:10
answers
answers:2
is accepted
isaccepted:true
is closed
isclosed:true
Recent Posts
Post GATE 2024 Guidance [Counseling tips and resources]
GATE CSE 2024 Result Responses
[Project Contest] Pytorch backend support for MLCommons Cpp Inference implementation
Participating in MLCommons Inference v4.0 submission (deadline is February 23 12pm IST)
IIITH PGEE 2024 Test Series by GO Classes
Subjects
All categories
General Aptitude
(3.5k)
Engineering Mathematics
(10.4k)
Digital Logic
(3.6k)
Programming and DS
(6.2k)
Algorithms
(4.8k)
Theory of Computation
(6.9k)
Compiler Design
(2.5k)
Operating System
(5.2k)
Databases
(4.8k)
CO and Architecture
(4.0k)
Computer Networks
(4.9k)
Artificial Intelligence
(79)
Machine Learning
(48)
Data Mining and Warehousing
(25)
Non GATE
(1.4k)
Others
(2.7k)
Admissions
(684)
Exam Queries
(1.6k)
Tier 1 Placement Questions
(17)
Job Queries
(80)
Projects
(11)
Unknown Category
(870)
64.3k
questions
77.9k
answers
244k
comments
80.0k
users
Recent Blog Comments
category ?
Hi @Arjun sir, I have obtained a score of 591 in ...
download here
Can you please tell about IIT-H mtech CSE self...
Please add your admission queries here:...
Twitter
WhatsApp
Facebook
Reddit
LinkedIn
Email
Link Copied!
Copy
