Counting number of "AND" and "OR" gates in a multiplexer and decoder. How do we approach such questions?

Question

Answer 1

$\underline{\text{In General}}:$

$\text{For implimentation of MUX using Decoder, the no. of Input lines of MUX must be SAME as no of Output lines of Decoder}.$

$\text{i.e N = $2^{k}$ }$

$\text{In $2^{k} \times 1$ MUX, for $2^{k}$ no of  Inputs, total $2^{k}$ multiplications & 1 Addition needed to convert them into single Output Line}.$

$\text{∴ $2^{k}$  AND Gates & 1 OR gates needed. }$

 

$\underline{\textbf{This is Implimentation of $4\times1$ MUX using $2\times4$ Decoder }}:$

 

$\underline{\textbf{Correct Ans}}: \text{Option A, C}$

Comments

Got it! Thanks. @AniMan_7