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Design a memory system of capacity 2048x16 using 128x8 RAM chips.

Show address lines, data lines, and control signals
in CO and Architecture
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The required has a word length of 16 bits and we are given chips of word length 8 bits, hence we would need horizontal stacking of 2 chips to get the word to 16 bits.

The total capacity needed = 2048 * 16 bits

The capacity of one chip given to us = 128 * 8 bits

Therefore the total number of chips will be = $2048 * 16 / 128 * 8 = 32$  chips

Now as we know that there will be two chips side by side to make the word length 16 bits the number of chips in vertical fashion will be  = $ 32/2 = 16$ chips

 

The data line will be of 16 bits since word size is 16 bits

 

For address, we will need $4 bits$ to select the chip number (which one out of 16 to select from vertical alignment) and $7 bits$ then to choose from the 128 words present in that individual $128X8$ chip.

 

The diagram will look as follows:

 

 

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