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A processor with $16$ general purpose registers uses a $32$-bit instruction format. The instruction format consists of an opcode field, an addressing mode field, two register operand fields, and a $16$-bit scalar field. If $8$ addressing modes are to be supported, the maximum number of unique opcodes possible for every addressing mode is ___________.
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in qustn las5tline it is asking no. of unique opcodes for every addressing modes so will the answer be 32/8 = 4    

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yah...even i think the same
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No. Maximum number of unique opcodes possible for all 8 addressing modes will be 32 only.
Consider case where $1^{st}$ gets 32 opcodes and rest all get 0. The question is asking for maximum so answer will be 32

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Instruction size = 32 bits

Given that no. of Registers = 16

So no. of bits needed to specify a register in instruction = 4

Given that no. of Addressing modes = 8

So no. of bits needed to specify an addressing mode in instruction = 3

No. of bits available for opcode = Instruction size - (Addressing mode field size + 2 * Register field size + Scalar field size)

 = 32 - (3 + 2*4 + 16)

 = 32 - 27

 = 5

So maximum no. of unique opcodes possible = 2^5 = 32

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