GATE CSE 2000 | Question: 9

Question

Design a logic circuit to convert a single digit BCD number to the number modulo six as follows (Do not detect illegal input):

• A. Write the truth table for all bits. Label the input bits $I_1, I_2, \ldots$ with $I_1$ as the least significant bit. Label the output bits $R_1, R_2\ldots$ with $R_1$ as the least significant bit. Use $1$ to signify truth.
• B. Draw one circuit for each output bit using, altogether, two two-input AND gates, one two-input  OR gate and two NOT gates.

Answer 1

$${\begin{array}{|cccc|c|ccc|}\hline
\bf{I_4}&    \bf{I_3}&  \bf{I_2}&\bf{ I_1}& &\bf{R_3}& \bf{R_2} & \bf{R_1}\\\hline
0&0&0&0&\bf{0} &0&0&0\\\hline 0&0&0&1&\bf{1}& 0&0&1 \\ \hline    0&0&1&0&\bf{2}& 0&1&0 \\ \hline 0&0&1&1&\bf{3}& 0&1&1 \\ \hline 0&1&0&0&\bf{4}& 1&0&0 \\ \hline   0&1&0&1&\bf{5} &1&0&1  \\ \hline  0&1&1&0&\bf{6}& 0&0&0 \\ \hline0&1&1&1&\bf{7}& 0&0&1\\ \hline    1&0&0&0&\bf{8}& 0&1&0 \\ \hline 1&0&0&1&\bf{9}& 0&1&1 \\ \hline
 \end{array}}$$

• $R_1 = I_1$
• $R_2 = I_2\overline{ I_3} + I_4$
• $R_3 = I_3\overline{I_2}$

This requires $2$ NOT gates, $2$ two-input AND gates and $1$ two-input OR gate. 

Comments

corrected.

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R2=(i2)'(i4) + (i2)(i3')

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The question says that a single digit BCD is converted. BCD values range from 0 to 9 only. So we can consider all the output values for (10,11,12,13,14,15) as don't cares. The answer is right. :)

Answer 2

After using Don't care (10,11,12,13,14,15) and after K-Map simplification you will get

R1=I1

R2=I2.I3' + I4

R3= I3.I2'

R4 = 0

Here, 2 input AND Gate used=2

          2 input OR Gate used=1

          NOT Gate used=2

Answer 3

Don't cares are not shown in the table but considered while constructing K-map for $R_1,R_2,R_3.$