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I mean:

Searching time is hit/miss latency

Accessing time means: how much time CPU will take in read/write.

If this is the correct explanation then in hierarchical memory access.

Tavg = H1T1 + (1-H1)(T1+T2)

So if data is miss in level 1 then CPU can't access it from the  level1 then why we are taking T1+T2 

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" So if data is miss in level 1 then CPU can't access it from the  level1 then why we are taking T1+T2 "

if Data is miss in level one but we also waste T1 time in searching for that data in Level 1

thats why we consider T1

Whether it is present in cache or not we have to search for it in cache
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T1 is accessing time not searching time....Searching time is hit/miss latency
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@Rock, This is called looking at something as close as it starts blurring. I do not know, where you read it, but searching time/ accessing time/ reading time/ writing time all are same, unless and until they have not told specifically different. The formula, you have written, T1 is memory access time, of Level 1 memory, and it represents checking of all the block present in level 1's cache. That's it.
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