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Recent questions tagged combinational-circuit

2 votes

1 answer

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GO Classes Test Series 2024 | Mock GATE | Test 14 | Question: 28
Consider function $\mathbf{G}(\mathbf{A}, \mathbf{B}, \mathbf{C})=\mathbf{A B}+\mathbf{B C}$. Let $\mathbf{F}(\mathbf{A}, \mathbf{B}, \mathbf{C})$ ... input to a 2-to-1 multiplexer. The correct implementation of $\mathbf{F}(\mathbf{A}, \mathbf{B}, \mathbf{C})$ is shown in:

GO Classes asked in Digital Logic Feb 5

446 views

3 votes

0 answers

2

GO Classes Test Series 2024 | Mock GATE | Test 14 | Question: 60
The logic circuit above is used to compare two unsigned 2-bit numbers, $X_1 X_0=X$ and $Y_1 Y_0=Y$, where $X_0$ and $Y_0$ are the least significant bits. (A small circle on any line in a logic diagram indicates logical NOT.) Which of the following always makes the output $Z$ have the value 1? $X\gt Y$ $X\lt Y$ $X=Y$ $X \neq Y$

GO Classes asked in Digital Logic Feb 5

299 views

4 votes

2 answers

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GO Classes Test Series 2024 | Mock GATE | Test 13 | Question: 60
You are asked to implement the following four functions with half-adders: ... of half-adders required to implement all four functions simultaneously? (You are not allowed to use any other logic element but half-adder)

GO Classes asked in Digital Logic Jan 28

459 views

4 votes

1 answer

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GO Classes Test Series 2024 | Mock GATE | Test 12 | Question: 21
How many $\text{4-to-1}$ multiplexers are needed to implement a $\text{64-to-1}$ multiplexer?

GO Classes asked in Digital Logic Jan 21

374 views

2 votes

1 answer

5

GO Classes Test Series 2024 | Mock GATE | Test 12 | Question: 22
What is the output for the following circuit? $w=\overline{b} c$ $w=b \oplus c$ $w=\overline{b \oplus c}$ $w=\overline{b}+\overline{c}$

GO Classes asked in Digital Logic Jan 21

365 views

5 votes

2 answers

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GO Classes Test Series 2024 | Mock GATE | Test 12 | Question: 53
Consider the following $4$-bit adder circuit. Note, $\text{C}_0$ is carry in and $\text{C}_4$ is carry out for the $4$-bit adder. The given circuit operates on $\text{2's}$ ... $\text{S}=1$

GO Classes asked in Digital Logic Jan 21

628 views

3 votes

1 answer

7

GO Classes Test Series 2024 | Mock GATE | Test 11 | Question: 16
Which one of the following options is CORRECT for the given logic circuit? $P=1, Q=1 ; X=0$ $P=1, Q=0 ; X=1$ $P=0, Q=1 ; X=0$ $P=0, Q=0 ; X=1$

GO Classes asked in Digital Logic Jan 13

356 views

4 votes

1 answer

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GO Classes Test Series 2024 | Mock GATE | Test 11 | Question: 40
What is the output, $f(a,b,c,d),$ for the following circuit? $\Sigma(1,3,6,13,14,15)$ $\Sigma(1,3,6,9,10,14)$ $\Sigma(1,3,5,6,9,10,14)$ $\Sigma(1,3,5,6,9,10,12)$

GO Classes asked in Digital Logic Jan 13

515 views

0 votes

2 answers

9

Digital Logic | Sample question
The number of full and half-adders required to add $32$-bit numbers is______________________

rajveer43 asked in Digital Logic Jan 12

183 views

0 votes

1 answer

10

ISRO 2024
A full adder circuit requires two inputs and two outputs two inputs and three outputs three inputs and two outputs three inputs and one output A request to the approver.!! This question is asked in ISRO 2024. Due to insufficient points, couldn’t add ‘isro2024’ tag, Please add it.

Ramayya asked in Digital Logic Jan 7

124 views

1 vote

1 answer

11

Doubt in NAND and NOR gate.
Why NAND gate is preferred over NOR gate?

prajjwal_191 asked in Digital Logic Dec 9, 2023

by prajjwal_191

147 views

0 votes

0 answers

12

Madeeasy ots Digital Logic Combinational Circuits
I am confused in active low enable input and active low output?

Sajal Mallick asked in Digital Logic Nov 23, 2023

by Sajal Mallick

194 views

0 votes

1 answer

13

Digital Logic Made Easy OTS

Sajal Mallick asked in Digital Logic Nov 18, 2023

by Sajal Mallick

266 views

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Recent questions tagged combinational-circuit