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Recent questions tagged isi2012-pcb-cs
1
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1
ISI2012-PCB-CS-6b
A network has $125$ stations attached by a dedicated pair of lines to a hub in a star topology. The distance from each station to the hub is $25$ meters, the speed of the transmission lines is $10$ Mbps, all frames are of length $12500$ bytes, and ... time. Assume that each station can transmit up to a maximum of $k = 2$ frames/token. Find the maximum throughput of the network.
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Computer Networks
Jun 3, 2016
by
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641
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descriptive
isi2012-pcb-cs
computer-networks
throughput
1
vote
3
answers
2
ISI2012-PCB-CS-6a
Consider a LIBRARY database consisting of the following entity sets: Book (bookid, title, publishername) Book authors (bookid, authorname) Publisher (publishername, address, phonenumber) Bookcopies (bookid, accessionnumber) Book loans (bookid, cardnumber, issuedate, ... the borrowers who do not have any book issued. Hence write an equivalent SQL statement for the above query.
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Databases
Jun 3, 2016
by
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770
views
descriptive
isi2012-pcb-cs
databases
relational-algebra
sql
2
votes
0
answers
3
ISI2012-PCB-CS-5b
Let $T$ be an AVL tree for storing a set of $n$ integers. Insertions and deletions in $T$ can hence be done in $O(\log n)$ time. Given two integers $a$ and $b, \: a < b$, you have to output nab, the number of integers in T whose ... $T$ and its insertion algorithm are required? Give a pseudo-code for computing $n_{ab}$.
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in
DS
Jun 3, 2016
by
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383
views
descriptive
isi2012-pcb-cs
data-structures
avl-tree
1
vote
0
answers
4
ISI2012-PCB-CS-5a
Suppose you have the following three subroutines: $\text{max}(A, i, j)$: returns the index of the maximum among the set of consecutive elements $A[i, \dots, j]$ of the array $A$. $\text{min}(A, i, j)$: returns the index of the minimum among the set of ... time complexity of the first two subroutines is $O(k)$, where $k = j − i$, and that for the third subroutine is $O(1)$.
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in
Algorithms
Jun 3, 2016
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465
views
descriptive
isi2012-pcb-cs
algorithms
sorting
1
vote
0
answers
5
ISI2012-PCB-CS-4
A fan of order $n$ is a graph on the vertices $\{0, 1, \dots, n\}$ with $2n − 1$ edges defined as follows: vertex $0$ is connected by an edge to each of the other $n$ vertices, and vertex $i$ ... the number of spanning trees of the fan of order $n$. Calculate $f_4$. Write a recurrence for $f_n$. Solve for fn using ordinary generating functions.
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in
Graph Theory
Jun 2, 2016
by
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684
views
descriptive
isi2012-pcb-cs
graph-theory
spanning-tree
generating-functions
3
votes
1
answer
6
ISI2012-PCB-CS-3
Design a Turing machine that recognizes the unary language consisting of all strings of 0’s whose length is a power of 2, i.e., $L = \{0^{2n} \mid n \geq 0\}$
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Theory of Computation
Jun 2, 2016
by
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924
views
descriptive
isi2012-pcb-cs
theory-of-computation
turing-machine
2
votes
1
answer
7
ISI2012-PCB-CS-2c
Add the following two floating point numbers $A$ and $B$ given in IEEE $754$ single precision format and show the sum $S$ in the same format. $A: 0000011000100 \: 0000 \: 000000000000001$ $B: 1000011000100 \: 0000 \: 000000000000001$
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Digital Logic
Jun 2, 2016
by
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514
views
descriptive
isi2012-pcb-cs
digital-logic
number-representation
ieee-representation
1
vote
0
answers
8
ISI2012-PCB-CS-2b
The CPU of a computer has a ripple-carry implementation of a $2$'s complement adder that takes two $8$ - bit integers $A = a_7a_6 \dots a_0$ and $B = b_7b_6 \dots b_0$ as inputs, and produces a sum $S = s_7s_6 \dots s_0$ ... $B = 1000 \: 0110$. What will be the output $S$ of the adder? How will the value of $S$ be interpreted by the machine?
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in
Digital Logic
Jun 2, 2016
by
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512
views
descriptive
isi2012-pcb-cs
digital-logic
adder
18
votes
5
answers
9
ISI2012-PCB-CS-2a
A machine $\mathcal{M}$ has the following five pipeline stages; their respective time requirements in nanoseconds (ns) are given within parentheses: $F$-stage - instruction fetch ($9$ ns), $D$-stage - instruction decode and register fetch ($3$ ns), $X$-stage ... $3$rd instruction needs a $1$ - cycle stall before the $X$-stage. Calculate the CPU time in seconds for completing $P$.
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CO and Architecture
Jun 2, 2016
by
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2.6k
views
descriptive
isi2012-pcb-cs
co-and-architecture
pipelining
1
vote
1
answer
10
ISI2012-PCB-CS-1b
Two processes $P_1$ and $P_2$ have a common shared variable count. While $P_1$ increments it, $P_2$ decrements it. Given that $R_0$ is a register, the corresponding assembly language codes are: $P_1$ count++ $P_2$ count-- MOV $count$ $R_0$ ... $P_1$ and $P_2$ are executed simultaneously.
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Operating System
Jun 2, 2016
by
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588
views
descriptive
isi2012-pcb-cs
operating-system
process-synchronization
1
vote
0
answers
11
ISI2012-PCB-CS-1a
In a Buddy memory allocation system, a process is allocated an amount of memory whose size is the smallest power of $2$ that is greater than or equal to the amount requested by the process. A system using buddy memory allocation has $1MB$ ... entire span of the above sequence. Calculate the total memory wasted due to fragmentation in your memory allocation by the above scheme.
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Operating System
Jun 2, 2016
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637
views
descriptive
isi2012-pcb-cs
operating-system
memory-management
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