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Recent questions tagged memory-management
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Galvin Edition 9 Exercise 8 Question 8 (Page No. 390-391)
In the IBM/370, memory protection is provided through the use of keys. A key is a 4-bit quantity. Each 2-K block of memory has a key (the storage key) associated with it. The CPU also has a key (the ... Multiprogramming with a fixed number of processes $d$. Multiprogramming with a variable number of processes $e$. Paging $f$.Segmentation
akash.dinkar12
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Operating System
Mar 21, 2019
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akash.dinkar12
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galvin
operating-system
memory-management
descriptive
0
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0
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212
Galvin Edition 9 Exercise 8 Question 7 (Page No. 390)
Sharing segments among processes without requiring that they have the same segment number is possible in a dynamically linked segmentation system. a. Define a system that allows static linking and sharing of segments without requiring that ... a paging scheme that allows pages to be shared without requiring that the page numbers be the same.
akash.dinkar12
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Operating System
Mar 21, 2019
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akash.dinkar12
502
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galvin
operating-system
memory-management
descriptive
0
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0
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213
Galvin Edition 9 Exercise 8 Question 6 (Page No. 390)
Describe a mechanism by which one segment could belong to the address space of two different processes.
akash.dinkar12
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Operating System
Mar 21, 2019
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akash.dinkar12
351
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galvin
operating-system
memory-management
descriptive
1
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214
Galvin Edition 9 Exercise 8 Question 5 (Page No. 390)
What is the effect of allowing two entries in a page table to point to the same page frame in memory? Explain how this effect could be used to decrease the amount of time needed to copy a large amount of memory from one place to another. What effect would updating some byte on the one page have on the other page ?
akash.dinkar12
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Operating System
Mar 21, 2019
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akash.dinkar12
329
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galvin
operating-system
memory-management
descriptive
1
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1
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215
Galvin Edition 9 Exercise 8 Question 4 (Page No. 390)
Consider a logical address space of $64$ pages of $1,024$ words each, mapped onto a physical memory of $32$ frames. $a$. How many bits are there in the logical address ? $b$. How many bits are there in the physical address ?
akash.dinkar12
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Operating System
Mar 21, 2019
by
akash.dinkar12
321
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galvin
operating-system
memory-management
0
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2
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216
Galvin Edition 9 Exercise 8 Question 3 (Page No. 390)
Why are page sizes always powers of 2 ?
akash.dinkar12
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Operating System
Mar 21, 2019
by
akash.dinkar12
252
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galvin
operating-system
memory-management
descriptive
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217
Galvin Edition 9 Exercise 8 Question 2 (Page No. 390)
Consider a system in which a program can be separated into two parts: code and data. The $CPU$ knows whether it wants an instruction (instruction fetch) or data (data fetch or store). Therefore, two base-limit ... automatically read-only, so programs can be shared among different users. Discuss the advantages and disadvantages of this scheme.
akash.dinkar12
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Operating System
Mar 21, 2019
by
akash.dinkar12
217
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galvin
operating-system
memory-management
descriptive
0
votes
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218
Galvin Edition 9 Exercise 8 Question 1 (Page No. 390)
Name two differences between logical and physical addresses.
akash.dinkar12
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Operating System
Mar 21, 2019
by
akash.dinkar12
158
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galvin
operating-system
memory-management
descriptive
0
votes
1
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219
Virtual Memory
The minimum number of page frames that must be allocated to a running process in a virtual memory environment is determined by Instruction Set Architecture page size physical memory size number of processes in memory Why the answer for the above question is “ISA” ?? Please explain the concept behind it
s_dr_13
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in
Operating System
Mar 8, 2019
by
s_dr_13
459
views
virtual-memory
memory-management
2
votes
1
answer
220
MadeEasy Subject Test 2019: Operating System - Memory Management
Please explain it with solution or concept.
Naveen Muralidhar
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in
Operating System
Jan 20, 2019
by
Naveen Muralidhar
654
views
memory-management
operating-system
made-easy-test-series
1
vote
2
answers
221
Applied Course | Mock GATE | Test 1 | Question: 49
How much memory is used for page tables, when there are $10$ process running in the system with the below details? Virtual Address space: $1GB$ Page size: $1KB$ Each page table entry contains a valid bit, dirty bit and the resulting frame number. And the system has a maximum of $2^{14}$ physical pages. $10$ MB $20$ MB $30$ MB None of these
Applied Course
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Operating System
Jan 16, 2019
by
Applied Course
734
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applied-course-2019-mock1
operating-system
memory-management
paging
2
votes
0
answers
222
Ace Test Series: Operating System - Virtual Memory
amitqy
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Operating System
Jan 12, 2019
by
amitqy
818
views
operating-system
virtual-memory
paging
memory-management
ace-test-series
2
votes
1
answer
223
Paging and virtual memory
If there is 2 or more level paging for processes, is it possible to have more than 1 page fault while accessing any single addressable unit(byte or word) ?
3lurryface
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in
Operating System
Jan 9, 2019
by
3lurryface
1.1k
views
operating-system
virtual-memory
memory-management
paging
0
votes
0
answers
224
UPPCL AE 2018:61
Consider a computer system with $32-$ bit virtual addressing and page size of sixty-four kilobytes. The computer system has one-level page table per process with each page table entry of $6$ bytes. If the maximum physical memory size supported by this paging system is ... how many bits can be used for flags and permissions within a page table entry? $6$ None of the above $7$ $5$
admin
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in
Operating System
Jan 5, 2019
by
admin
297
views
uppcl2018
operating-system
memory-management
paging
0
votes
0
answers
225
UPPCL AE 2018:57
Consider the following $\text{C}$ function executed in an $\text{OS}$ with paging where the page size is $4$ kilobytes. Further, assume that the system employs a $32-$ entry direct mapped $\text{TLB}$ int *alloc_and_init() { int counter, value = 0, size = 2048; int ... of the program, what is the number of $\text{TLB}$ misses during the execution of the for loop? $2048$ $2$ $0$ $1$
admin
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in
Operating System
Jan 5, 2019
by
admin
247
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uppcl2018
operating-system
memory-management
page-fault
translation-lookaside-buffer
0
votes
1
answer
226
UPPCL AE 2018:21
Assume a memory access to main memory on a cache “miss” takes $30 \; \text{ns}$ and a memory access to the cache (on a cache “hit”) takes $3 \; \text{ns}.$ If $80 \%$ of the processor’s memory requests result in a cache “hit”, what is the average memory access time? $8.4 \text{ns}$ $9 \text{ns}$ $4.4 \text{ns}$ $2.2 \text{ns}$
admin
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in
Operating System
Jan 5, 2019
by
admin
560
views
uppcl2018
operating-system
memory-management
cache-memory
misses
0
votes
1
answer
227
Relation between physical address, logical address and relocation register
Physical address is (A) The logical address added by the value in re-locatable registers (B) Re location register – logical address (C) Re location address + relocation register (D) None of these
Raj Singh 1
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in
Operating System
Jan 3, 2019
by
Raj Singh 1
5.0k
views
paging
memory-management
4
votes
1
answer
228
GATE Overflow | Mock GATE | Test 1 | Question: 18
Assume a program has just referenced an address in virtual memory. Which of the following scenario cannot occur? TLB miss with no page fault TLB hit and page replacement TLB miss and page fault TLB hit with no page fault
Ruturaj Mohanty
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in
Operating System
Dec 27, 2018
by
Ruturaj Mohanty
1.3k
views
go-mockgate-1
operating-system
memory-management
virtual-memory
2
votes
2
answers
229
GATE Overflow | Mock GATE | Test 1 | Question: 19
A computer system consists of infinitely large primary memory storage capacity. In other words the physical address space exceeds the logical address space significantly in all cases. In such situation which of the following ... cannot be used in such situation Virtual memory concept can be used to give multiprogramming capability to system
Ruturaj Mohanty
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in
Operating System
Dec 27, 2018
by
Ruturaj Mohanty
1.5k
views
go-mockgate-1
operating-system
memory-management
virtual-memory
8
votes
1
answer
230
GATE Overflow | Mock GATE | Test 1 | Question: 38
Consider a system with paging-based memory management, whose architecture allows for a $4\text{GB}$ virtual address space for processes. The size of logical pages and physical frames is $4\text{KB}$. The system has $8\text{GB}$ physical RAM. The system allows a maximum of ... $4 \text{GB} + 4 \text{KB}$ $4 \text{MB} + 4 \text{GB}$
Ruturaj Mohanty
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in
Operating System
Dec 27, 2018
by
Ruturaj Mohanty
2.4k
views
go-mockgate-1
virtual-memory
memory-management
operating-system
0
votes
3
answers
231
MadeEasy Test Series: Operating System - Memory Management
Ramij
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in
Operating System
Dec 26, 2018
by
Ramij
939
views
made-easy-test-series
operating-system
memory-management
paging
1
vote
0
answers
232
MadeEasy Test Series: Operating System - Memory Management
Consider five memory partitions of size $100 \text{ KB }, 500 \text{ KB }, 200 \text{ KB }, 450 \text{ KB and } 600 \text{ KB }$ ... Both next fit and best fit results in same None of the above Answer given by ME: Option $(B)$ My answer: Option $(D)$
zeeshanmohnavi
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in
Operating System
Dec 25, 2018
by
zeeshanmohnavi
774
views
made-easy-test-series
operating-system
memory-management
0
votes
0
answers
233
Multi-level paging-doubt
Consider a system which has 2 level paging.The page table is divided into 2K pages and each page is having 4K entries.Memory is word addressable and Physical address space is 64MW which is divided into 16K frames.Page table entry size is 2 words. (A)Length ... with result what I am getting. Is question poor or I am poor at multi-level paging?(Please tell where I went wrong)
Ayush Upadhyaya
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in
Operating System
Dec 24, 2018
by
Ayush Upadhyaya
1.8k
views
operating-system
memory-management
multilevel-paging
0
votes
1
answer
234
madeeasy OS 2019- Memory overhead multilevel paging
for memory overhead in Multi level paging, for innermost table only 1 page size shall be counted na? and NOT the complete page table size? please explain the concept, thanks!
Markzuck
asked
in
Operating System
Dec 22, 2018
by
Markzuck
1.3k
views
multilevel-paging
paging
operating-system
memory-management
0
votes
1
answer
235
multilevel paging
Rahul_Rathod_
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in
Operating System
Dec 15, 2018
by
Rahul_Rathod_
722
views
paging
multilevel-paging
memory-management
operating-system
0
votes
1
answer
236
NIELIT 2018-38
Find the effective access time for the memory for the given data. Page fault service time $=8$ ms Average memory access time $=20$ ns One page fault is generated for every memory access $=10^6$ $29$ ns $33$ ns $28$ ns $30$ ns
Arjun
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in
Operating System
Dec 7, 2018
by
Arjun
2.1k
views
nielit-2018
operating-system
memory-management
2
votes
2
answers
237
MadeEasy Test Series: Operating System - Memory Management
Consider a paging scheme, in which average process size is 32MB and each page table entry size is 4B. The optimal size of page to minimize the total overload due to page table and internal fragmentation is _______KB.
balraj_allam
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in
Operating System
Dec 6, 2018
by
balraj_allam
1.7k
views
made-easy-test-series
operating-system
memory-management
paging
0
votes
0
answers
238
GA Testseries
aditi19
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in
CO and Architecture
Dec 6, 2018
by
aditi19
536
views
memory-management
cache-memory
1
vote
1
answer
239
MadeEasy Workbook: Operating System - Memory Management
Consider the following sequence: Process P1 of size 7k loaded Process P2 of size 4k loaded Process P1 is terminated and space is returned Process P3 of size 3k loaded Process P4 of size 6k loaded If a system has 16KB memory and buddy system ... much space is wasted due to internal fragmentation? (Assume frame size is 1K). A 1K B 2K C 3K D NONE
Soumya Tiwari
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in
Operating System
Dec 2, 2018
by
Soumya Tiwari
1.2k
views
operating-system
memory-management
made-easy-booklet
4
votes
3
answers
240
Bit Map
A bit-map can be used to keep track of which blocks are free in a file-system’s partition on disk. Assuming, 1 KB block size and a disk size of 40 GB, what is the size of the bit map?
Shivangi Parashar 2
asked
in
Operating System
Nov 27, 2018
by
Shivangi Parashar 2
5.6k
views
operating-system
memory-management
bitmap
numerical-answers
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