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Recent questions tagged memory-management
1
vote
1
answer
61
Gate@Zeal 2023
Ans: 3KB
SKMAKM
asked
in
Operating System
Oct 2, 2022
by
SKMAKM
523
views
operating-system
memory-management
numerical-answers
zeal-test-series
2
votes
0
answers
62
Operating System: Self Doubt - Memory Management
Considering a system with Single-Level page table, with a TLB to reduce the access time of pages. A cache is also provided with the main memory. All the pages ultimately reside in MM. (assuming there's no page fault). Let, TLB Hit Ratio = x TLB Access ... for TLB miss it will be (a+c+p). But if this is true, why can't we store Page Table in a Cache?
DebRC
asked
in
Operating System
Sep 14, 2022
by
DebRC
359
views
memory-management
operating-system
paging
cache-memory
self-doubt
0
votes
0
answers
63
Computer Organization and Architecture
Please clarify the fourth option only. My doubt: if the same word in requires repeatedly, then for the first the word will be miss and there after it is continuously in use how it can be miss.
Overflow04
asked
in
CO and Architecture
Sep 3, 2022
by
Overflow04
279
views
co-and-architecture
ace-test-series
self-doubt
memory-management
0
votes
0
answers
64
Computer Organization and Architecture
While calculating the average read time , why 0.9*10 + 0.1*(10+110) is not used. .i.e. why cache time is not added in miss frequency.
Overflow04
asked
in
CO and Architecture
Sep 3, 2022
by
Overflow04
299
views
co-and-architecture
ace-test-series
memory-management
0
votes
1
answer
65
Which consumes less memory: opening many tabs on the same browser window or opening few tabs on many browser windows?
Nisha Bharti
asked
in
Operating System
Sep 2, 2022
by
Nisha Bharti
308
views
memory-management
self-doubt
0
votes
0
answers
66
Operating System
How to solve this question.
Overflow04
asked
in
Operating System
Sep 1, 2022
by
Overflow04
329
views
operating-system
ace-test-series
memory-management
0
votes
0
answers
67
Best Open Video Playlist for Memory Management Topic | Operating Systems
Please list out the best free available video playlist for Memory Management from Operating Systems as an answer here (only one playlist per answer). We'll then select the best playlist and add to GO classroom video ... ones are more likely to be selected as best. For the full list of selected videos please see here
makhdoom ghaya
asked
in
Study Resources
Aug 20, 2022
by
makhdoom ghaya
185
views
go-classroom
missing-videos
free-videos
video-links
memory-management
0
votes
0
answers
68
What is the empty 4 bytes below the "valid" variable?
int main(int argc, char *argv[]) { int valid = 0; char str1[8] = "start"; char str2[8]; gets(str2); if (strncmp(str1, str2, 8) == 0) valid = 1; printf("buffer1: str1(%s), str2(%s), valid(%d)\n", str1, str2, valid); }
Tejeshwara
asked
in
Programming in C
Jun 12, 2022
by
Tejeshwara
477
views
programming-in-c
memory-management
23
votes
2
answers
69
GATE CSE 2022 | Question: 28
Which one of the following statements is $\text{FALSE}?$ The $\text{TLB}$ performs an associative search in parallel on all its valid entries using page number of incoming virtual address. If the virtual address of a word given by $\text{CPU}$ has a ... $\text{V2}$ map to the same value while hashing, then the memory access time of these addresses will not be the same.
Arjun
asked
in
Operating System
Feb 15, 2022
by
Arjun
7.9k
views
gatecse-2022
operating-system
memory-management
translation-lookaside-buffer
2-marks
0
votes
1
answer
70
Gate Applied Test Series
Question: Consider a system using a segmented paging architecture. The segment is divided into 8k pages each of size 2k words . The segment table is divided into 256 k pages each of size 512 words. The page table entry size requires 64 bits . The frame number requires 22 bits ... address (LA). Note: 1 Word = 1 Byte Options Are: A. 51 bits B. 61 bits C. 33 bits D. 64 bits
lalitver10
asked
in
Operating System
Jan 11, 2022
by
lalitver10
1.3k
views
operating-system
segmentation
memory-management
1
vote
1
answer
71
Memory Management
In a virtual memory system, size of the virtual address is 32-bit, size of the physical address is 30-bit, page size is 4 KByte and size of each page table entry is 32-bit. The main memory is word addressable and word size is 4Bytes. Find the maximum number of bits that can be used for storing other information ?
Vidya Sagar
asked
in
Operating System
Jan 3, 2022
by
Vidya Sagar
1.2k
views
operating-system
memory-management
virtual-memory
paging
2
votes
2
answers
72
Gate Applied course Test series
What is answer for this question and also please explain the approach
Dheeraj Varma
asked
in
Operating System
Nov 16, 2021
by
Dheeraj Varma
1.2k
views
virtual-memory
operating-system
memory
memory-management
0
votes
1
answer
73
Applied Test Series
An operating system implements a single level paging. This system uses Translation Lookaside Buffer (TLB) and Physical Address Cache (PAC) as well. TLB has a hit ratio 90%. PAC has a miss ratio of 20%. Main memory access time, TLB access time and ... ns respectively. Assuming that all the pages of the process are in main memory, the effective memory access time is ______ (ns).
LRU
asked
in
Operating System
Nov 3, 2021
by
LRU
836
views
test-series
operating-system
memory-management
effective-memory-access
1
vote
0
answers
74
Page Table Entries in page Table
In Page Table,page-frame address entries are static or Dynamic means whether they are changed or not??(Consider 1-level page table)
lalitver10
asked
in
Operating System
Oct 21, 2021
by
lalitver10
561
views
operating-system
memory-management
virtual-memory
self-doubt
1
vote
1
answer
75
Applied Practice test
Suppose: TLB lookup time = 20 ns TLB hit ratio = 80% Memory access time = 75 ns PFST = 500,000 ns 50% of the pages are dirty OS uses a single level page table What is the approximated effective access time (EAT) if we assume the page fault rate is 10%? Assume the cost to update the TLB, the page table, and the frame table (if needed) is negligible.
darshak_devani
asked
in
Operating System
Oct 18, 2021
by
darshak_devani
815
views
memory-management
translation-lookaside-buffer
hit-ratio
2
votes
0
answers
76
Applied Test Series
A hypothetical system OSXZ_09 implements paging. Given LAS = 4 GB, PAS = 64 MB, Page size = 4 KB. A protection bit and a reference bit is also present in a page table entry. Then the size of the innermost page table is ____ B. Note : The memory is byte addressable.
LRU
asked
in
Operating System
Oct 11, 2021
by
LRU
852
views
test-series
memory-management
operating-system
61
votes
4
answers
77
GATE CSE 2021 Set 2 | Question: 48
Consider a three-level page table to translate a $39-$bit virtual address to a physical address as shown below: The page size is $\text{4 KB} \;(1\text{KB}=2^{10}$ bytes$)$ and page table entry size at every level is $8$ bytes. A ... $P$ across all levels is _________ $\text{KB}$.
Arjun
asked
in
Operating System
Feb 18, 2021
by
Arjun
28.2k
views
gatecse-2021-set2
numerical-answers
operating-system
memory-management
page-replacement
2-marks
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