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Recent questions tagged multiplexer
8
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31
GATE CSE 2023 | Question: 11
The output of a $2$-input multiplexer is connected back to one of its inputs as shown in the figure. Match the functional equivalence of this circuit to one of the following options. $\text{D}$ Flip-flop $\text{D}$ Latch Half-adder Demultiplexer
admin
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Digital Logic
Feb 15, 2023
by
admin
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gatecse-2023
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19
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3
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32
GATE CSE 2023 | Question: 34
A Boolean digital circuit is composed using two $4$-input multiplexers $\text{(M1 and M2)}$ and one $2$-input multiplexer $\text{(M3)}$ as shown in the figure. $\text{X0-X7}$ are the inputs of the multiplexers $\text{M1 and M2}$ and could be connected to either $0$ or $1.$ The select lines of the ... $(1,1,0,0,1,1,0,1)$ $(1,1,0,1,1,1,0,0)$ $(0,0,1,1,0,1,1,1)$
admin
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Digital Logic
Feb 15, 2023
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admin
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gatecse-2023
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0
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33
Make a full adder with two 4 x 1 Multiplexers.
M.Zain
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Digital Logic
Dec 30, 2022
by
M.Zain
142
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digital-logic
multiplexer
0
votes
1
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34
MUX | digital-logic multiplexer | MadeEasy
Ans: 35 Please Explain
abhinowKatore
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Digital Logic
Dec 23, 2022
by
abhinowKatore
889
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digital-logic
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made-easy-test-series
1
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1
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35
MadeEasy Workbook | MUX
abhinowKatore
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Digital Logic
Nov 3, 2022
by
abhinowKatore
401
views
multiplexer
digital-logic
made-easy-booklet
1
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0
answers
36
DIGITAL LOGIC | MUX conversion | MadeEasy Workbook question
abhinowKatore
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in
Digital Logic
Nov 3, 2022
by
abhinowKatore
398
views
digital-logic
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3
votes
2
answers
37
GO Classes Test Series 2023 | Digital Logic | Test 2 | Question: 23
Assume you need a $64$-to-$1$ multiplexer controlled by $6$ select signals $A$ through $F,$ i.e., a binary number $ABCDEF$ specifies the index of the input to be sent to the output. However, as we assume a logic gate can not have more than ... of $X_{1} Y_{1} X_{2} Y_{2} X_{3} Y_{3}$ should be $011011$ $110110$ $111001$ $100111$
GO Classes
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May 27, 2022
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GO Classes
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goclasses2024-dl-2-weekly-quiz
goclasses
digital-logic
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2-marks
2
votes
2
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38
Applied Test Series
What will be the output ?
LRU
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in
Digital Logic
Oct 21, 2021
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LRU
373
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test-series
digital-logic
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17
votes
6
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39
GATE CSE 2021 Set 2 | Question: 5
Which one of the following circuits implements the Boolean function given below? $f(x,y,z) = m_0+m_1+m_3+m_4+m_5+m_6$, where $m_i$ is the $i^{\text{th}}$ minterm.
Arjun
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in
Digital Logic
Feb 18, 2021
by
Arjun
9.0k
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gatecse-2021-set2
digital-logic
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1-mark
1
vote
1
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40
NIELIT 2017 OCT Scientific Assistant A (IT) - Section B: 30
How many $2$-input multiplexers are required to construct a $2^{10}$ input multiplexer? $1023$ $31$ $10$ $127$
admin
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Digital Logic
Apr 1, 2020
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admin
930
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nielit2017oct-assistanta-it
digital-logic
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1
vote
3
answers
41
NIELIT 2017 July Scientist B (IT) - Section B: 50
Which one of the following is the function of a multiplexer? To decode information To select $1$ out of $N$ input data sources and to transmit it to single channel To transmit data on $N$ lines To perform serial to parallel conversion
admin
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Digital Logic
Mar 30, 2020
by
admin
1.5k
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nielit2017july-scientistb-it
digital-logic
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1
vote
2
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42
NIELIT 2017 July Scientist B (CS) - Section B: 17
The digital multiplexer is basically a combination logic circuit to perform the operation AND-AND OR-OR AND-OR OR-AND
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Mar 30, 2020
by
admin
3.6k
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nielit2017july-scientistb-cs
digital-logic
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12
votes
2
answers
43
GATE CSE 2020 | Question: 19
A multiplexer is placed between a group of $32$ registers and an accumulator to regulate data movement such that at any given point in time the content of only one register will move to the accumulator. The number of select lines needed for the multiplexer is ______.
Arjun
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Digital Logic
Feb 12, 2020
by
Arjun
6.6k
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gatecse-2020
numerical-answers
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