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How the "caching disabled" bit in page table entry prevent caching of I/O registers?
lowOnATP
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Jun 25, 2015
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I mean, how is it possible? We cant access page table before looking into cache? I think I am missing some point.
Thanks in advance.
lowOnATP
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I get it. Before moving a page into cache , its cache disabled bit is checked from page table entry. If it is 1, the page is not moved into cache.
lowOnATP
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Jun 25, 2015
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Jul 12, 2015
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Arjun
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