GATE1992-04-b

Question

A priority encoder accepts three input signals $\text{(A, B and C)}$ and produces a two-bit output $(X_1, X_0 )$ corresponding to the highest priority active input signal. Assume $A$ has the highest priority followed by $B$ and $C$ has the lowest priority. If none of the inputs are active the output should be $00$, design the priority encoder using $4:1$ multiplexers as the main components.

Comments

be aware, in this above lecture, he did some mistake ..!

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yes @ankit, he did a mistake, 0's will be put only in 01 rows in second k-map.

Answer 1

$\text{MSB} - \text{Most Significant Bit}$
$\text{LSB} - \text{Least Significant Bit}$

$\begin{array}{ccccc}
\rlap{\text{TRUTH TABLE}} \\
\rlap{\text{Inputs}: A,B,C}\\
\rlap{\text{Outputs}: \text{MSB},\text{LSB}}\\
A &B&C&\quad\text{MSB}&\text{LSB}\\
0&0&0&0&0\\
0&0&1&0&1\\
0&1&X&1&0\\
1&X&X&1&1\\\hline
\end{array}$

$\text{MSB} = A+B$
$\text{LSB} =A + \bar B C$ 

 

It can be implemented using two $4 \times 1$ Multiplexers.

Comments

Here why u select C as input of MUX?

shouldnot it be signal to see which MUX is active at a time and other deactive at that time?

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no we can't do like that, we need both MSB and LSB at any time thats why both the mux should be active all the time

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https://en.wikipedia.org/wiki/Priority_encoder

why u took o/p 1 for 001 i/p??

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@ अनुराग पाण्डेय how you derive expression (K-map??) if yes then how you have taken the inputs please comment.

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Is this realisation possible if "If none of the inputs are active the output should be 00" - this statement is not present in question?

$\begin{array}{ccccc}

A &B&C&\quad\text{MSB}&\text{LSB}\\
0&0&0&X&X\\
0&0&1&0&0\\
0&1&X&0&1\\
1&X&X&1&0\\\hline
\end{array}$

$MSB=A$

$LSB=A \bar{B}$

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@ 2018 Given in question "If none of the inputs are active the output should be 00", so lowest priority should start with "01" and not "00"

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Assume A has the highest priority followed by Band C has the lowest priority.

and wiki says

If two or more inputs are given at the same time, the input having the highest priority will take precedence.^[1] An example of a single bit 4 to 2 encoder is shown, where highest-priority inputs are to the left and "x" indicates an irrelevant value - i.e. any input value there yields the same output since it is superseded by higher-priority input. 

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@ srestha how the expression for MSB and LSB is derived?

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for final circuit it is just an assumption

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@srestha - No, it is not just any assumption. See below logic and let me know if anything is wrong in this. :)

LSB= A + $\overline{B}C$

So the min terms are (1,4,5,6,7)

We can choose any two inputs as select lines. We just have to derive all the min terms from these select lines.

Below is the MUX using B and C as select lines.

We can also implement the function using A and B as select lines as shown below.

We can also implement the same function using A and C as select lines. :)

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Why 1st MUX input 0,1,1,1??

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I think for the second MUX input should be C101 for respective input lines then only you can get A+B'C.

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I think that the positions of (A - S0, B - S1) as the selection inputs should be interchanged to (A - S1, B - S0) in the diagram, as A is more significant than B.

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For the second mux,(in my previous comment) the equation is as follows:

$\overline{AB}C + A\overline{B} + AB$

$= \overline{AB}C + A$

$= (\overline{A}+A) (\overline{B}+A) (C+A)$

$= (\overline{B}+A) (C+A)$

$= \overline{B}C + \overline{B}A + AC + A$

$= \overline{B}C + A(\overline{B}+C+1)$

$= \overline{B}C + A$

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How LSB and MSB are mapped? What I mean is why 11 is maped with ABC=1XX only and not with any other input?

Answer 2

We can implement the priority encoder using two $4:1$. Multiplexers as main components and $1$ NOT gate and $1$ OR gate
Using following truth table (Priority encoder with highest priority to $A$)$$\begin{array}{cccc|cc}  \textbf{A} & \textbf {B} &\textbf {C} & \textbf {X} &  \textbf{$X_1$ } & \textbf{$X_0$}\\ \hline 0& 0& 0  & \text{X} &0 &0\\ 0& 0& 1  & \text{X} &0 &1\\  0& 1& \text{X} & \text{X} &1 &0 \\ 1& \text{X}& \text{X}  & \text{X} &1 &1 \\ \end{array}$$

Comments

Can you please explain logic behind second mux? I'm getting the answer here : https://gateoverflow.in/17407/gate1992_04_b

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i know the priority encoders but not able to understand this above concept plz clear me????

Answer 3

we know the truth table of priority encoder .

now we have a multiplexer. we need to do selection in a abnormal way. means we have to play with select lines . and we have 2 output from the above function. relize them and then give input to the select line of muxs.

y1= i3+i2

y0=i3+ i2' i1

now make y1 as s1 select line .and y0 as s0.

Comments

I have understood that here we have made selection i/p(s0 and s1) a bit complex in order to select any of the (x3,x2,or x1). But this encoder o/p should be 2 bits. How are we acheiving that thing?

Answer 4

$X_0 = \bar{A} \bar{B} C + A$

$X_1 = \bar{A} B  + A$

 

Comments

Input to the first MUX ($X_1$) should be 0111 then characteristic equation:

$X_1=\ A'B'(0)+A'B(1)+AB'(1)+AB(1) = A'B+A(B'+B) = A'B+A = A+B$.

Input to second MUX ($X_0$) should be C011 then characteristic equation:

$X_0=\ A'B'C+A'B(0)+AB'(1)+AB(1) = A'B'C+0+A(B'+B) = A'B'C+ A$.