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A processor uses 36 bit physical address and 32 bit virtual addresses, with a page frame size of 4 Kbytes. Each page table entry is of size 4 bytes. A three level page table is used for virtual to physical address translation, where the virtual address space  is  as follows:

4 9 7 12

The number of bits required for addressing the next level page table(or page frame) in the page table entry of the first, second and third level page tables are respectively.

modified from : https://gateoverflow.in/490/gate2008-67 

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explain kar do
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@Shubhanshu sir

@akash.dinkar12 sir

plz explain the solution!

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For the explanation refer Arjun sir's explanation, that explanation is amazing.
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