MadeEasy Subject Test: CO & Architecture - Cache Memory

Question

A cache memory is 30 times faster than main memory (MM) and 50% of the time cache is referred for the execution of instruction. The performance is gained by introducing this cache is ________.

What I did

EMAT = 0.5(M/30)+0.5(M/30+M) = 32M/60

speed up=  (M)/32M/60)

       =60/32=1.875

answer given is 1.90-1.97 (using amdhal’s law)

Comments

@adarsh_1997 could you please help! where m i going wrong?

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@eyeamgj @shaik masthan @Gupta731

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I added as an answer..please check

Answer 1

Initially I was also getting 1.88.
Then I realized memory is accessed twice [Taking a general case] , so I approached it differently .
Let time to access main memory = x units
So time to access cache = x/30 [Since 30 times faster]
In non cache environment , total time of memory access for 1 instruction = 2x
In cache environment :-
For instruction = 1/2[x/30] +1/2x
For 2nd memory operation = 1/2[x/30] +1/2x
Therefor total time in cached environment = x/30 + x units

Performance gain = 2x / (x/30 + x units) = 60/31 = 1.94

Comments

sorry brother But I don't think this is the approach here @prashant jha 1

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I might be wrong  :) Learning just :D

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But why do you think it is wrong , I might get where I am going wrong :)

Answer 2

Suppose main memory access takes $t_m$ and cache access takes $\frac{t_m}{30}$ as it is 30 times faster.

when the cache was not there, access took $t_m$ time.

now when the cache is introduced it takes $0.5\frac{t_m}{30}+0.5t_m =\frac{t_m}{60}+\frac{t_m}{2}$

Now speed up will be $\frac{earlier\ time}{new\ time}$

$=\frac{t_m}{\frac{t_m}{60}+\frac{t_m}{2}}$

$=\frac{t_m}{\frac{t_m+30t_m}{60}}$

$=\frac{t_m\times60}{31t_m}$

$\frac{60}{31}=1.93$

Comments

@Gupta731 why are you using simultaneous access and why not hierarchical ?

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I  still dont know what this simultaneous and hierarchical stuff is. Both are same formula one is expanded and one is compressed. But they give different answers I dont know why. Similar is the case with pipeline formula k+(n-1)tp and k*tp+(n-1)tp.

But somehow on reading the question I get the intuition on which one to use and manage to get the correct answer.

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Bro @Gupta731 Simultaneous and hierarchical access are two different things. Its is not just about formulae, they are two different way to access memory.

You can surf stuffs over gateoverflow to clear it out, if not found ping me ill send you some.

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Yes, I have read about it in the book. I know the theory part but I still don't know which one to use when. I just use intuition.

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@Gupta731 https://gateoverflow.in/14480/formula-write-back-write-through-access-time-parallel-serial

Hope this would help.

 

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@Gurdeep Saini Could you please help?

Answer 3

let x be a factor, when multiplying with the x we will get the actual memory reference time;

effective time before cache was introduced = 1 x (30 x) = 30x

effective time after cache is introduced = 0.5( 1 x) + 0.5 ( 30 x) = 15.5x

since 50% time it is referencing cache.

performance gain = 30x /15.5x = 1.93