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Consider the system which has virtual address of 36 bits and physical address of 30 bits and page size of 8
KB, page table entry contain 1 valid bit, 2 protection bit and 1 reference bit. Then the approximate page
table size in (MB) is ________.
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Okay got it.
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edited by

I think Page Table Entry should be padded. A similar question was asked in Gate which is as below.

https://gateoverflow.in/739/gate2001-2-21

(Without padding the answer would have been 1.75 MB and using padding the answer is 2 MB) 


Also in many practical implementations, the Page table entry is rounded up as it is said in the below link.

https://stackoverflow.com/questions/47525296/how-is-the-size-of-a-single-page-table-entry-affected-when-the-page-size-changes

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Agreed, Memories are word addressable. If the entries are not padded, accessing them will be difficult as the starting point of entry will be in between somewhere in a byte and not at the beginning at byte.

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