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Andrew S. Tanenbaum (OS) Edition 4 Exercise 3 Question 23 (Page No. 256)
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How can the associative memory device needed for a $TLB$ be implemented in hardware, and what are the implications of such a design for expandability?
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Andrew S. Tanenbaum (OS) Edition 4 Exercise 3 Question 22 (Page No. 256)
A computer whose processes have $1024$ pages in their address spaces keeps its page tables in memory. The overhead required for reading a word from the page table is $5\: nsec.$ To reduce this overhead, the computer has a $TLB,$ ... a lookup in $1\: nsec.$ What hit rate is needed to reduce the mean overhead to $2\: nsec?$
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Andrew S. Tanenbaum (OS) Edition 4 Exercise 3 Question 55 (Page No. 261 - 262)
Write a program that can be used to compare the effectiveness of adding a tag field to $TLB$ entries when control is toggled between two programs. The tag field is used to effectively label each entry with the ... for a simple (but nontrivial) input example. Plot the number of $TLB$ updates per $1000$ references.
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Andrew S. Tanenbaum (OS) Edition 4 Exercise 3 Question 11 (Page No. 255)
Consider the following C program: int X[N]; int step = M; /* M is some predefined constant */ for (int i = 0; i < N; i += step) X[i] = X[i] + 1; If this program is run on a machine with ... for every execution of the inner loop? Would your answer in part $(a)$ be different if the loop were repeated many times? Explain.
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Andrew S. Tanenbaum (OS) Edition 4 Exercise 3 Question 26 (Page No. 256)
A student in a compiler design course proposes to the professor a project of writing a compiler that will produce a list of page references that can be used to implement the optimal page replacement algorithm. Is this possible? Why or why not? Is there anything that could be done to improve paging efficiency at run time?
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