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  • a) A = 0, 1, 0, 0, B = 1, 0, 1, 1
  • b) A = 1, 0, 1, 1, B = 0, 1, 0, 0
  • c) A = 1, 1, 0, 0, B = 1, 1, 0, 0
  • d) A = 0, 1, 0, 0, B = 0, 1, 0, 0

    I thought it would be (c) as previous states should persist for 1st clock. But answer given is (a). Can somebody please explain??
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4 Comments

I guess some triggering information should be given in the question.

Considering level triggered circuit, insignificant processing delay at gates, and only one transition per gate per second.

I got a).

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Ok. got it thanks. Actually I was trying to map given inputs with some edge triggered clock (so, was trying to maintain previous states). But, it turns out to be just a plain simple question. Thanx Anurag and Japurva :)
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@anurag , i think this will be gud , the clock specifies that before counting the circuit was at 0 0 . so we can consider that it will be 1  1 at clock zero .and after that .
A = (present value of x * previous stage of B) '

B= ( previous stage of a * current stage of y) '

so it will come right from starting .
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I wasn't sure that whether we are allowed to use the values of $X$ and $Y$ before the $1$st second (starting point of observation), so I put a don't care for $A$ there.

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1 Answer

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Best answer

So value of A,B at timing 1,3,5,8 is
A:-0,1,0,0
B:-1,0,1,1
So option A is right

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see . what i think we have not assumed it its given see the timing diagram . before applying clock the value of x and y are 0 and 0 . so what will be A . a will be one and the b will also be 1 . initially it would have taken 2 cycles. but i am taking it has stabilised as we don't know the circuit started just before it was given. i am taking it was started a lot before and form then on the value are zero , or constant input were there,
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confused again
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Do not get confused, it is not specified that it will change on edge. So, you are free to assume dat it can work on level triggered clock. So, if first approach didnt work, try this.
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